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1174 M.A. Huff et al.

complexity needed to take measurements on a MEMS device without any on-chip

circuitry.

Table 14.7 uses the values in Tables 14.5 and 14.6 to calculate the total cost of

a packaged and tested die for three hybrid scenarios that include a two-die conﬁg-

uration wherein the CMOS die from a 150 mm process technology is combined

with a die from a 150 mm diameter MEMS wafer, a two-die conﬁguration wherein

the CMOS die from a 200 mm process technology is combined with a die from a

200 mm diameter MEMS wafer, and a two-die conﬁguration wherein the CMOS die

from a 200 mm process technology is combined with a 150 mm diameter MEMS

wafer. Also shown in the last two rows are the cases of an integrated MEMS pro-

cess technology on both 150 and 200 mm diameter wafers, respectively. Adding the

packaging and testing costs ($0.12 for the integrated device and $0.16 for a two-chip

device) from Tables 14.5 and 14.6, we calculate the packaged die cost in Table 14.7.

For example, in the two-die CMOS and MEMS 150 mm wafer case in the ﬁrst col-

umn, $0.224 is calculated from ($0.018 + $0.037 + $0.16)/96%; in the integrated

150 mm wafer case, $0.279 is equal to ($0.148 + $0.12)/96%.

Figure 14.92 presents the calculated costs for the two-die system wherein both

the CMOS and MEMS substrates are produced using 150 mm diameter wafers,

compared to an integrated MEMS process technology produced on a 150 mm diam-

eter wafer. The system costs are plotted as a function of the CMOS controller die

area along the x-axis. As can be seen, no matter the CMOS controller die size, the

two-chip system is always less expensive. This may be a surprising result consid-

ering that there are both integrated and nonintegrated devices in the marketplace.

However, as we discussed in Sections 14.5.6 and 14.6.1, the decision to use an

integrated or nonintegrated process requires a full system-level tradeoff analysis

and time-to-market business consideration, not simply a cost analysis. Figure 14.93

presents the calculated costs for the two-die system wherein both the CMOS and

MEMS substrates are produced using 200 mm diameter wafers, compared to an inte-

grated MEMS process technology produced on a 200 mm diameter wafer. The sys-

tem costs are plotted as a function of the CMOS controller die area along the x-axis.

Again, no matter the CMOS controller die size, the two-chip system is always less

expensive.

Obviously, the parameters of this model that are most difﬁcult to estimate are the

MEMS wafer production costs, the MEMS packaging, assembly, and testing costs,

and the yield of the MEMS manufacturing process. (Note: the model portrayed here

is only applicable if the MEMS is capped on the wafer level and therefore this

cost is included in the MEMS device production cost.) Estimates for each of these

parameters are best performed by very experienced fabricators by creating a range

for each of these parameters and then calculating the associated costs in order to set

reasonable boundaries of the actual costs. Similar t o estimation of the development

costs, there are organizations that can develop production cost estimates for MEMS

devices [98, 99].

14 MEMS Process Integration 1175

Table 14.7 Calculation of the total system cost for various conﬁgurations

Total cost for packaged and tested system

2 chip CMOS and MEMS 150 mm wafer

[Cost, 2 Chip 150]

$ Cost, 2 Chip 150 = (DCCC150 +

DMCC150 + AM Cost + PT

Cost)/YPT

0.215 0.244 0.283 0.322 0.362

2 chip CMOS and MEMS 200 mm wafer

[Cost, 2 Chip 200]

$ Cost, 2 Chip 200 = (DCCC200 +

DMCC200 + AM Cost + PT

Cost)/YPT

0.206 0.220 0.249 0.278 0.307

2 chip 150 mm MEMS wafer with 200 mm

CMOS wafer [Cost, 2Chip, M150 + C200]

$ Cost, 2 Chip, M150 + C200 =

(DCCC200 + DMCC150 + AM Cost

+ PT Cost)/YPT

0.219 0.233 0.262 0.291 0.320

Integrated 150 mm wafer [Cost, I150] $ Cost I150 = (PT Cost + ICC150)/YPT 0.279 0.357 0.514 0.672 0.832

Integrated 200 mm wafer [Cost, I200] $ Cost I200 = (PT Cost + ICC200)/YPT 0.227 0.278 0.382 0.486 0.592

Including fabrication, packaging, assembly, and testing. As in Tables 14.3 and 14.4, the columns represent CMOS controller die areas of 0.5, 1, 2, 3, and

4mm

, respectively

1176 M.A. Huff et al.

Fig. 14.92 Calculated costs for the two-die system wherein both the CMOS and MEMS substrates

are produced using 150 mm diameter wafers, compared to an integrated MEMS process technology

produced on a 150 mm diameter wafer. Both system costs are plotted as a function of the CMOS

controller die area

Fig. 14.93 Calculated costs for the two-die system wherein both the CMOS and MEMS substrates

are produced using 200 mm diameter wafers, compared to an integrated MEMS process technology

produced on a 200 mm diameter wafer. Both system costs are plotted as a function of the CMOS

controller die area

14.10 Conclusions

In this chapter we have attempted to provide a concise understanding and appre-

ciation of MEMS process integration. A review of the similarities and differences

between MEMS and the related integrated circuit technology was provided, along

with some guidance on how MEMS process sequences are successfully developed.

We have also reviewed many of the most noteworthy and important MEMS process

sequences and technologies that have been developed to date, showing examples

14 MEMS Process Integration 1177

both with and without microelectronics integrated with MEMS. In addition to being

a general reference, these wide ranging examples can bolster a designer’s experi-

ence base for MEMS process integration strategies that were successful. We have

provided the general strategy for MEMS cost analysis, and pointed out the com-

plexity of performing such a cost analysis accurately. Unless a MEMS developer

has the opportunity to leverage a known, running manufacturing process, there are

a very large number of variables that are very difﬁcult to predict, particularly the

various yield values. Indeed, it is not uncommon to be off by a factor of two or more

in such circumstances. We presented a set of “generic” cases as a cost comparison

example. Although the values in this example are meant to be close to “real-world”

costs, it is important to understand that these costs are for illustrative purposes only.

Calculating MEMS development and manufacturing costs, and hence ROI, is difﬁ-

cult and is often based on less than complete or accurate information. In the end,

this analysis is part art, as well as science, and can only be done with the input of

MEMS technologists with signiﬁcant experience.

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This is Blank Page Integra xxxii

Index

Absorption, 68, 213, 228, 280, 333, 416,

570, 683–684, 687, 716, 740–741,

846, 925, 969–971, 975–977, 982,

984–985, 994, 998–1002, 1152

Actuator, 178, 183, 228–230, 235, 274–275,

286–292, 296, 299, 313–314,

327, 329–332, 335–339, 341–342,

355–357, 360, 363

–364, 367–368,

371–373, 375, 379, 381–384,

387–397, 458, 579, 755, 1075,

1114–1115, 1126, 1137

Adhesion, 107, 138, 145, 163, 169, 171,

174, 179–180, 194, 198, 200, 203,

206, 215, 218, 226–227, 233–234,

236–237, 242, 244, 246–247, 249,

369, 371, 377, 397,

489, 570, 584,

624, 671, 686, 692, 723–725, 729,

736, 740, 822, 824, 827, 830, 838,

846–847, 849–850, 861–862, 890,

903–905, 907, 911, 913, 926–928,

932, 934–939, 942, 944, 957, 973,

986, 993–994, 997, 1021, 1027,

1057, 1082, 1130

Adhesive bonding, 198, 847–848, 855

, 892,

896–897, 1102

Aluminum nitride (AlN), 111, 113, 274,

276–277, 282, 295, 299–317, 332,

334, 343, 438, 440, 522, 613, 706,

1019, 1078, 1084–1085

Anisotropic etch, 4, 25, 69, 74, 236, 390, 405,

410–411, 420–421, 423, 428, 431,

443, 459, 462–463, 465–466, 491,

531, 535, 579–583,

589, 597, 617,

767–770, 832, 1055, 1105, 1133,

1143, 1147

Anodic bonding, 4, 389, 819–821, 836,

840–846, 855–856, 897–898, 909,

1104, 1116

Antireﬂection, 196, 884, 970, 972, 978–982,

985–990, 992–993, 995, 998–999,

1001

Assembly, 7–8, 216, 221, 369–371, 377,

382–383, 395, 397, 480

, 570, 681,

704, 718, 736, 792, 819, 844,

848, 880–881, 886, 891–892, 895,

903–904, 914–917, 919–920, 969,

997, 1062–1063, 1067, 1074–1075,

1077, 1095, 1102, 1133, 1156,

1162, 1165–1167, 1174–1175

Benzocyclobutene, 198, 205, 235–238, 451,

848, 897

Bonding tools, 198, 828, 831, 834–835

837–838, 866–867, 869, 872

Bond strength, 180, 819, 838–841, 852,

854–856, 863–864, 866, 897, 901,

907, 913

Catheter, 368–369, 378–384

Ceramic packaging, 159, 887

Chemical etch, 139, 163, 176, 178, 180,

197–199, 305, 325, 365–368, 377,

387, 404, 409, 412, 420, 438, 441,

471, 482–483, 491–492

, 510–511,

513–516, 540–541, 570–580,

595–599, 603–608, 610, 623–625,

629, 686, 712, 765–766, 769–770,

773, 859, 1056, 1070, 1104–1105,

1115, 1117, 1126, 1142–1144, 1160

Chemical mechanical planarization, 925,

1002–1032, 1114

Chitosan, 218–220

CMOS-MEMS Integration, 1157

Coil, 52, 141–142, 184, 217, 226, 361, 369,

376,

378–384, 391–392, 395–396,

414–415, 1026–1028

R. Ghodssi, P. Lin (eds.), MEMS Materials and Processes Handbook,

MEMS Reference Shelf, DOI 10.1007/978-0-387-47318-5,

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Springer Science+Business Media, LLC 2011

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