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814 A.D. Raisanen

46. D. Briand, M. Sarret, K. Kis-Sion, T. Mohammed-Brahim, P. Duverneuil: In-Situ doping

of silicon deposited by LPCVD: pressure inﬂuence on dopant incorporation mechanisms,

Semicond. Sci. Technol. 14, 173–180 (1999)

47. T. Sinno, E. Dornberger, W. Von Ammon, R.A. Brown, F. Dupret: Defect engineering of

Czochralski single-crystal silicon, Mater. Sci. Eng. 28, 149–198 (2000)

48. W. Zulehner: Czochralski growth of silicon, J. Crystal Growth 65, 189–213 (1983)

49. T.F. Ciszek: Solid-source boron doping of ﬂoat-zoned silicon, J. Crystal Growth 264, 116–122

(2004)

50. E.F. Schubert: Delta doping of III-V compound semiconductors: fundamentals and device

applications, J. Vac. Sci. Technol. A 8, 2980–2996 (1990)

51. T.L. Chu, C.H. Lee, G.A. Gruber: The preparation and properties of amorphous silicon nitride

ﬁlms, J. Electrochem. Soc. 114, 717–722 (1967)

52. D. Mathiot, J.C. Pﬁster: Dopant diffusion in silicon: A consistent view involving nonequilib-

rium defects, J. Appl. Phys. 55, 3518–3530 (1984)

53. Y. Ishikawa, Y. Sakina, H. Tanaka, S. Matsumoto, T. Niimi: The enhanced diffusion of arsenic

and phosphorus in silicon by thermal oxidation, J. Electrochem. Soc. 129, 644–648 (1982)

54. B. Swaminathan, K.C. Saraswat, R.W. Dutton, T.I. Kamins: Diffusion of arsenic in polycrys-

talline silicon, Appl. Phys. Lett. 40, 795–798 (1982)

55. P.M. Fahey, P.B. Grifﬁn, J.D. Plummer: Point defects and dopant diffusion in silicon, Rev.

Mod. Phys. 61, 289–384 (1989)

56. M. Abramowitz, I. Stegun: Handbook of Mathematical Functions (Dover, New York, NY,

1972)

57. B.H. Justice, R. Aycock: Spin-On Dopant Method, U.S. Patent 4514440 (1985)

58. T. Aoyama, H. Tashiro, K. Suzuki: Diffusion of boron, phosphorus, arsenic, and antimony in

thermally grown silicon dioxide, J. Electrochem. Soc. 146, 1879–1883 (1999)

59. J.D. Plummer: Silicon VLSI Technology (Prentice-Hall, Englewood Cliffs, NJ, 2000)

60. Code available at www-tcad.stanford.edu at the time of this writing

61. J.F. Ziegler, J.P. Biersack, U. Littmark: The Stopping Range of Ions in Solids (Pergamon Press,

New York, NY, 1985), SRIM software available for download at the time of this writing at

www.srim.org

62. L.C. Northcliffe, R.F. Schilling: Range and stopping power tables for heavy ions, Nucl. Data

A7, 233–463 (1970)

63. G. Hobler: Theoretical estimate of the low-energy limit to ion channeling, Nucl. Instrum.

Meth. Phys. Res. B 115, 323–327 (1996)

64. C. Park, K.M. Klein, A.F. Tasch: Efﬁcient modeling parameter extraction for dual Pearson

approach to simulation of implanted impurity proﬁles in silicon, Solid-State Electron. 33,

645–650 (1990)

65. H.S. Chao, P.B. Grifﬁn, J.D. Plummer: Inﬂuence of dislocation loops created by amorphizing

implants on point defect and boron diffusion in silicon, Appl. Phys. Lett. 68, 3570–3572

(1996)

66. B. Diem, P. Rey, S. Renard, S.V. Bosson, H. Bono, F. Michel, M.T. Delaye, G. Delapierre: SOI

‘Simox’: From bulk to surface micromachining, a new age for silicon sensors and actuators,

Sens. Actuators A 46–47, 8–16 (1995)

67. M. Bruel, B. Aspar, A-J. Auberton-Herve: Smart-Cut: A new silicon on insulator mate-

rial technology based on hydrogen implantation and wafer bonding, Jpn. J. Appl. Phys. 36,

1636–1641 (1997)

68. A. Anders: Handbook of Plasma Immersion Ion Implantation and Deposition (Wiley, New

York, NY, 2000)

69. P.K. Chu, S. Qin, C. Chan, N.W. Cheung, L.A. Larson: Plasma immersion ion implantation –

A ﬂedgling technique for semiconductor processing, Mater. Sci. Eng. R17, 207–280 (1996)

70. M.A. Lieberman: Model of plasma immersion ion implantation, J. Appl. Phys. 66, 2926–2929

(1989)

71. C. Yu, N. Cheung: Trench doping conformality by plasma immersion ion implantation (PIII),

IEEE Electron Dev. Lett. 15, 196–198 (1994)

10 Doping Processes for MEMS 815

72. M.J. Goeckner, S.B. Felch, Z. Fang, D. Lenoble, J. Galvier, A. Grouillet, G.C.-F. Yeap, D.

Bang, M.-R. Lin: Plasma doping for shallow junctions, J. Vac. Sci. Technol. B 17, 2290–2293

(1999)

73. N.W. Cheung: Plasma immersion ion implantation for semiconductor processing, Mater.

Chem. Phys. 46, 132–139 (1996)

74. J. Pelletier, A. Anders: Plasma-based ion implantation and deposition: A review of physics,

technology, and applications, IEEE Trans. Plasma Sci. 33, 1944–1959 (2005)

75. P.K. Chu: Recent developments and applications of plasma immersion ion implantation,

J. Vac. Sci. Technol. B 22, 289–296 (2004)

76. R.B. Fair: Rapid Thermal Processing (Academic, Boston, MA, 1993)

77. V.E. Borishenko, P.J. Hesketh: Rapid Thermal Processing of Semiconductors (Plenum Press,

New York, NY, 1997)

78. T. Gebel, M. Voelskow, W. Skorupa, G. Mannino, V. Privitera, F. Priolo, E. Napolitani, A.

Carnera: Flash lamp annealing with millisecond pulses for ultra-shallow boron proﬁles in

silicon, Nucl. Instrum. Meth. Phys. Res. B 186, 287–291 (2002)

79. C.W. White, J. Narayan, R.T. Young: Laser annealing of ion-implanted semiconductors,

Science 4, 461–468 (1979)

80. R.F. Wood, G.E. Giles: Macroscopic theory of pulsed-laser annealing, Phys. Rev. B 23,

2923–2942 (1981)

81. S. Uchikoga, N. Ibaraki: Low-temperature poly-Si TFT-LCD by excimer laser anneal, Thin

Solid Films 383, 19–24 (2001)

82. L. Swartzendruber: Correction Factor Tables for Four-Point Probe Resistivity Measurements

on Thin, Circular Semiconductor Samples, National Bureau of Standards Technical Note 199

(1964)

83. F.M. Smits: Measurement of sheet resistivities with the four point probe, Bell Syst. Tech. J. 5,

711–718 (1958)

84. J.Z. Hu, I.L. Spain: Phases of silicon at high pressure, Solid State Commun. 51, 263–266

(1984)

85. T.H. Geballe, G.W. Hull: Seebeck effect in silicon, Phys. Rev. 98, 940–947 (1955)

86. S. Selberherr: Analysis and Simulation of Semiconductor Devices (Springer, New York, NY,

1984)

87. L.J. van der Pauw: A method of measuring speciﬁc resistivity and hall effect of discs of

arbitrary shape, Philips Res. R ep. 13, 1–9 (1958)

88. R. Subrahmanyan, H.Z. Massoud, R.B. Fair: Accurate Junction-Depth Measurements Using

Chemical Staining, Semiconductor Fabrication: Technology and Metrology, pp. 126–149

(American Society for Testing and Materials, Ann Arbor, MI, 1989)

89. J.L. Vossen, W. Kern: Thin Film Processes (Academic, San Diego, CA, 1978)

90. A.W. Czanderna, T.E. Madey, C.J. Powell: Beam Effects, Surface Topography, and Depth

Proﬁling in Surface Analysis (Plenum Press, New York, NY, 1998)

This is Blank Page Integra xxxii

Chapter 11

Wafer Bonding

Shawn J. Cunningham and Mario Kupnik

Abstract Wafer bonding is an integral part of the fabrication of MEMS, opto-

electronics, and heterogeneous wafer stacks, including silicon-on-insulator. Wafer

bonding can be divided into two technological groups: direct bonding and interme-

diate layer bonding. Direct bonding relies on the cohesive bond that is formed when

the surfaces of two wafers are brought together under speciﬁc temperature and pres-

sure conditions. Direct bonding relies on critical parameters such as surface energy,

surface roughness, and surface morphology. Intermediate layer bonding relies on

the cohesive bond that is formed when the surfaces of two wafers are mated with an

intermediate layer. The intermediate layer can be an adhesive, polymer, solder, glass

frit, or metal. Surface roughness and topography are less critical for bonding with

an intermediate layer. Wafer bonding has found application in MEMS to fabricate

MEMS devices, to encapsulate the MEMS device in an hermetic environment, and

to transfer bond a complete MEMS device to a wafer with integrated circuits. Wafer

bonding has found its earliest applications for pressure sensors and accelerometers,

but the applications remain boundless.

11.1 Introduction

Without having access to the toolbox “wafer bonding,” the realization of micro-

electromechanical systems ( MEMS), with its broad range of applications, would

be unimaginable. Wafer bonding is broadly classiﬁed as a bulk micromachining

method in contrast to a surface micromachining fabrication method, which so far

can be seen as the main method for the silicon integrated circuit (IC) industry. The

S.J. Cunningham (B)

WiSpry, Inc., Irvine, CA, USA

e-mail: shawn.cunningham@wispry.com

M. Kupnik (

Chair of General Electrical Engineering and Measurement Techniques, Brandenburg University of

Technology, Cottbus, Brandenburg, Germany

e-mail: kupnik@tu-cottbus.de

817

R. Ghodssi, P. Lin (eds.), MEMS Materials and Processes Handbook,

MEMS Reference Shelf, DOI 10.1007/978-0-387-47318-5_11,



Springer Science+Business Media, LLC 2011

818 S.J. Cunningham a nd M. Kupnik

reason to classify wafer bonding as bulk micromachining (i.e., in the same cat-

egory as etching deep feature into substrates) is that during wafer bonding two

entities, such as two wafers or individual dies and a substrate are brought into

contact. In surface micromachining mostly thin-ﬁlms are deposited, grown, pat-

terned, and selectively etched. This categorization is not ﬂawless, of course, because

sometimes wafer bonding is used to transfer a thin-ﬁlm only, such as the device

layer of a silicon-on-insulator (SOI) wafer on top of another wafer or the recently

emerging techniques in ultrathin wafer handling.

Wafer bonding can undoubtedly be counted as an enabling technology for the

ﬁeld of MEMS, in the same way one would count high-aspect-ratio micromachining

of silicon using deep reactive ion etching (DRIE) [1] or selectively etching sub-

strates with liquid etchants, just to give two examples. Wafer bonding provides us

with the ability to fabricate sophisticated structures; it allows sealing and encap-

sulating devices or parts of a wafer; it enables us to transfer layers of various

materials from one wafer to another wafer; or it simply provides support for a device

fabrication itself during a sequence of fabrication steps.

The latter example is probably the one the reader already might be familiar with,

in particular when she or he has some hands-on experience in microfabrication. Very

often it is helpful to spin photoresist on a carrier wafer and then press a device wafer,

or pieces of such a wafer, against it. By heating this stack, one has performed wafer

bonding with an intermediate layer, photoresist in this example. Even though most

of the time

this bond will be separated at some later point (e.g., by resist remover

or acetone), it is a ﬁrst simple example of its usefulness. The carrier wafer can be

used for mechanical support as a protection layer, or it can act as a holder for pieces

for further fabrication steps.

In general terms, wafer bonding aims to put two wafers (whole substrates or

pieces) together. This can be achieved either in a very nonintuitive way without

any intermediate material (direct bonding) or with an intermediate material (bond-

ing with intermediate material), as we explain later. In either case, the wafers can

be of the same material or of different materials. The range of possibilities of how

to achieve this goal, as we describe in this chapter, is extensive. The bond can be

required to be of a permanent nature (irreversible) for the realization of a particular

3-D MEMS structure, or of an impermanent nature (reversible) in the case where

a fabrication process requires or beneﬁts from such a step, as in the example men-

tioned before. There can be only one bonding step, or more than one for a multiwafer

stack (lamination).

The requirements for the bond are as versatile as the possibilities of how to per-

form the bond. In some applications one needs hermetic sealing capability, such as in

device encapsulation or devices that require vacuum cavities (e.g., pressure sensors,

capacitive micromachined ultrasonic transducers (CMUTs) [2], micro resonators

[3], or devices that need to be sealed in a certain ambient. In other applications an

electrical contact at the bonding interface might be required or the resilience against

liquid etchants might be essential for subsequent fabrication steps. The cleanliness

A good example for an exception where the resist (SU-8) is used as a permanent intermediate

layer for a MEMS device fabrication is described in [4].

11 Wafer Bonding 819

state of the wafer during a certain stage might limit the usage of certain materials

required for the bond, as well as the targeted bond strength that should be achieved

for reliable device operation and robustness in terms of humidity, thermal expansion

effects, or other inﬂuences.

There might be a certain thermal budget available that the wafers or materials

used can handle. A good example is the thermal limit a CMOS substrate can han-

dle (∼400–450

◦

C), which is an actual topic of importance for several applications

where s ets of arrays of MEMS devices beneﬁt from the integrated circuitry beneath,

with all its advantages (low parasitic capacitance, low-power consumption, etc.).

Such thermal limitation can be for performing the bond itself or to strengthen the

bond (irreversibility) in a subsequent annealing step. A good example f or the advent

of such an application is the monolithic integration of capacitive micromachined

ultrasonic transducer (CMUT) arrays for volumetric imaging probes and therapeutic

applications.

Another aspect of the thermal budget is the thermal expansion effects. The

thermal expansion effects are not signiﬁcant when bonding similar materials

together as in silicon–silicon direct bonding. The thermal budget and materials

are very important when bonding dissimilar materials or similar materials with

an intermediate layer. A good example is the anodic bonding of silicon to Pyrex.

Silicon and Pyrex do not have the same coefﬁcient of thermal expansion (CTE)

but in fact they do have the same CTE at two temperatures (316 and 528

◦

C). With

knowledge of the bonding temperature and the material CTE, the user can select

the optimal temperature to minimize stress in the bond interface or to minimize die

warpage. The thermal mismatch is subsequently important if the bonded assembly

is mounted to a ﬁrst-level package.

At this stage the reader might already recognize the breadth of the topic of wafer

bonding. Before describing the structure of this chapter, we would like to recom-

mend literature for further reading on the topic of wafer bonding. A good start

are the books Bonding in Microsystem Technology by Dziuban [5] (which con-

tains a lot of material for anodic wafer bonding), Semiconductor Wafer Bonding:

Science and Technology by Tong and Gösele [6], and Wafer Bonding: Applications

and Technology by Alexe and Gösele [7]. Furthermore, the excellent review articles

from Plößl and Kräuter [8] (focused on direct wafer bonding), Niklaus et al. [9],

and Schmidt [10] are highly recommended. In addition, we recommend the excel-

lent MIT thesis “Wafer Bonding: Mechanics-Based Models and Experiments” from

Turner [11].

In this chapter, our focus is on providing an overview on wafer bonding for

MEMS, and we discuss all the main techniques for wafer bonding suitable for

MEMS in general.

As mentioned earlier, wafer bonding can be done directly or by using an inter-

mediate material between the wafers. In fact, all wafer bonding techniques can be

classiﬁed based on this observation, as outlined in Fig. 11.1. A similar structure is

used for this chapter:

The ﬁrst part of the chapter is focused on direct wafer bonding, which is consid-

ered as the more difﬁcult bonding technique. As shown in Fig. 11.1, we list three

bonding techniques in the category of direct wafer bonding:

820 S.J. Cunningham a nd M. Kupnik

Wafer Bonding with

Intermediate Material

Direct Wafer Bonding

Wafer Bonding

Fusion Bonding:

High Temperature

Fusion Bonding:

Low Temperature

Silicon-Glass

Laser Bonding

Thermo Compression

Bonding

Anodic Bonding

Eutectic Bonding

Polymer Bonding

Metal-Metal Bonding

Solder Bonding

Glas Frit Bonding

Chemical Activation

Plasma

Activation

Fig. 11.1 Overview of various wafer-bonding techniques, classiﬁed by direct wafer bonding and

wafer bonding with intermediate materials

First, we have temperature-assisted direct wafer bonding at high or low tempera-

tures, often called fusion bonding. Because in both cases the activation is essential,

the two most frequently used techniques (i.e., chemical and plasma activation) are

listed as well. After providing some background information, we brieﬂy explain the

physics involved and deﬁne the key parameters required to quantify and verify the

requirements for successful temperature-assisted direct wafer bonding. Then some

general recommendations are given, which the reader might ﬁnd useful when plan-

ning a MEMS process t hat is based on direct wafer bonding. We then describe in

detail how a direct wafer bonding step is embedded in a MEMS device fabrication

process. In addition, we discuss how a wafer bonding tool works in principle, and

deﬁne when the usage of such a tool is inevitable.

Second, we list an electrochemically assisted direct wafer bonding technique at

lower temperatures (<500

◦

C), called anodic bonding. We count anodic bonding in

the direct bonding category, albeit there are cases (e.g., see Section 11.2.5), where

11 Wafer Bonding 821

an intermediate material s uch as Pyrex is sputtered on a wafer before the anodic

bonding step. However, for most cases two substrates, such as silicon and glass,

are anodic bonded without such an intermediate sputtered material. We explain the

basic principles and discuss an anodic-bonding-based MEMS fabrication process

for an accelerometer (wafer-level encapsulation).

The third technique that we list in the direct bonding category is silicon–glass

laser bonding, which is a laser-assisted direct wafer bonding technique.

The second part of the chapter is focused on wafer bonding with intermediate

materials. As shown in Fig. 11.1, there is large choice of techniques available. In this

chapter we only brieﬂy describe thermocompression bonding and eutectic bonding.

Then polymer bonding is discussed in more detail including some example MEMS

processes.

After comparing some of the main wafer bonding techniques in Section 11.4,we

brieﬂy discuss the bonding of heterogeneous compounds.

This is followed by a section about wafer bonding process integration focused

on localized wafer bonding and through wafer via technology, including several

process examples. The localized wafer bonding technique is one of the approaches

used to limit the temperature exposure of the full wafer or device(s). The through

via technology may not seem to belong in this chapter, which is true for many

applications. When we use direct bonding to form SOI or other heterogeneous struc-

tures, the through wafer vias are not important. When we apply wafer bonding to

encapsulation of a MEMS device, we have two alternatives: traverse the bond inter-

face with the electrical interconnect, or fabricate through wafer vias to achieve an

uninterrupted bond interface. Both scenarios have been successful.

In Section 11.7 we describe the main techniques to characterize the quality of

wafer bonding techniques in general, and then we provide information about the

existing wafer bonding infrastructure. At the end of the chapter, we list wafer bond-

ing service providers and introduce the wafer bonding tool vendors with examples

of their products suitable for MEMS applications.

11.2 Direct Wafer Bonding

As outlined in Fig. 11.1, there are several techniques for direct wafer bonding. In

microelectronics and the MEMS industry, direct wafer bonding is considered the

most difﬁcult wafer bonding technique. In addition to strict requirements in terms of

cleanliness (particle-free environment), the uncertainty might be related t o the lack

of availability of speciﬁc metrology tools during fabrication process development,

such as for surface roughness and wafer curvature. Another aspect related to this

might be proper surface activation before the direct bond. As we show at the end of

the chapter, in the last couple of years a healthy infrastructure of equipment vendors

and bonding service providers has developed, which will help to feature the full

potential of wafer bonding for MEMS in future.

822 S.J. Cunningham a nd M. Kupnik

11.2.1 Background and Physics

Direct wafer bonding describes the process of bonding two wafers together without

any intermediate material. Because wafers are composed of brittle material, direct

wafer bonding is fascinating: it contradicts our everyday experience. We are not

used to scenarios that two bodies just stick together without some assistance, such

as by glue or other malleable layers in between. In direct wafer bonding, however,

this is exactly the case, as demonstrated in Fig. 11.2.

For malleable materials it is easier to imagine that two surfaces can be brought

into close enough proximity so that forces between molecules or atoms start to play

a role, resulting in adhesion large enough that bonding occurs. Plastic deformation

provides enough mutual conformity on both sides that short-range forces can more

easily start to act.

In the case of brittle materials, such as silicon wafers, there is much less con-

formity between the two surfaces and bonding can occur only under very speciﬁc

conditions. It is exactly these conditions one needs to keep in mind when developing

a fabrication process for a MEMS device based on direct wafer bonding, as we later

show.

As outlined in the excellent review article from Plößl and Kräuter [8], which

contains a lot of material about the historic perspective on direct wafer bonding as

well, Galileo Galilei (1564–1642) had already hypothesized that two plane polished

surfaces of marble, metal, or glass, would adhere to each other whereas two rough

surfaces would not. Galilei postulated that it is the vacuum between the surfaces

that is the driving mechanism behind this adhesion. In the mean time, it is now well

known that this is not the case.

For direct wafer bonding, the short-range surface forces based on weak inter-

atomic bonds, such as van der Waals forces and hydrogen bonds are the dominant

ones. Van der Waals forces are attributed to ﬂuctuations in the electron distribution

around atoms resulting in polarization (dipoles) of neighboring atoms, which leads

to small but ﬁnite attraction forces [12]. They are much weaker, but act over slightly

larger distances, than strong chemical bonds (covalent bonds), in which pairs of

electrons are shared between atoms. The effect of van der Waals forces is best visu-

alized by a force-separation curve (Fig. 11.3). In terms of the given numbers, this

curve is only valid for van der Waals forces; that is, the effect of hydrogen bonds

is neglected. Such a curve can be understood as a result of the combination of two

force components. First, the forces of attraction fall off rapidly with separation as

expected. Second, there must be a repulsive force component that starts to domi-

nate at a certain distance (<∼0.2 nm), because otherwise the attractive forces alone

would let the material collapse into virtually zero volume.

The shaded area in Fig. 11.3 corresponds to the work of adhesion (W) available

for the bonding (energy per unit area), the total work done by the surface attraction.

Before bonding two identical surfaces, both surfaces provide half of W, that is, the

free surface energies γ

and γ

. When the bonding wave propagates, the area in

contact increases (Fig. 11.2), resulting in increasing the interface energy γ

. Thus,

the surface energy available for the remaining nonbonded area decreases.

11 Wafer Bonding 823

Before contact Contact 10 ms 20 ms 30 ms

50 ms 70 ms 80 ms 90 ms

110 ms 120 ms

60 ms

140 ms 150 ms

170 ms 180 ms 190 ms

130 ms

210 ms

220 ms 240 ms 250 ms 260 ms

200 ms

280 ms 290 ms 300 ms 310 ms 330 ms

270 ms

Fig. 11.2 Sequence of frames from a video that shows two 4 in. silicon wafers bonding together

without any intermediate material. The wafers were illuminated by an IR light source from the bot-

tom and an IR-sensitive camera was used. The wafers were placed on top of each other, separated

by 150 μm thick spacers at t he perimeter and then the direct bond was initiated by gently pushing

in the center with the backside of plastic tweezers. At locations where the two surfaces are already

in intimate contact, more IR light can pass through, which results in a brighter illumination for this

area. Within 330 ms the “bonding wave” propagated over a distance of 9 cm (visible diameter of

wafers in this setup)