Ghodssi R., Lin P., MEMS Materials and Processes Handbook

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1004 P. Lin e t al.

[208] investigated copper CMP in alkaline conditions and proposed that success-

ful copper CMP slurry should ensure that all materials dislodged from the copper

surface are dissolved, to avoid the re-deposition of copper oxide particulates. Re-

deposition signiﬁcantly reduces the effectiveness of mechanical abrasion and thus

lowers the material removal rate. Seal [209] and Park [210] studied the effect of

on the copper CMP process in acidic conditions. The results demonstrated that

slurry chemistry can change the polishing mechanism in CMP. More speciﬁcally, at

low H

concentrations, the copper removal is strongly dissolution-dependent. At

higher H

concentrations, a protective oxide ﬁlm rapidly forms on the copper

surface and prevents heavy dissolution. In this case, the process is controlled by

mechanical removal of copper and subsequent dissolution. At intermediate concen-

trations of H

, both polishing mechanisms coexist and compete. Kikkawa [211]

studied the effect of slurry chemistry on mechanical abrasion during copper CMP

with the in situ frictional force measurement technique. Slurry chemistry was found

to strongly affect the formation of a passivation ﬁlm on the copper surface and thus

change the friction force of the surface.

13.7.1.2 Mechanics of CMP

During the CMP process, the wafer, pad, and slurry constitute a classical tribolog-

ical system, normally regarded as a three-body interface with two solids in relative

motion and slurry at the interfaces [212, 213]. The Preston Equation is the most fre-

quently referenced expression for polishing rate in CMP [214, 215]. The equation

states:

R = KPV (13.53)

where R is the removal rate, P is the pressure, V is the linear velocity of the pad

relative to the workpiece, and K is the Preston coefﬁcient. According to Equation

(13.53), polishing rate is directly proportional to both the velocity of the pad and the

pressure. However, this equation does not agree with experimental results when the

velocity and/or pressure approaches zero. In order to account for this phenomenon,

Steigerwald et al. [208] proposed the following modiﬁed Preston Equation:

P = (K P + B)V + R

(13.54)

where B is a proportionality constant and R

is the chemical removal rate.

The correlation between polishing conditions and polishing results is widely

studied. Figures 13.50–13.53 show results from several representative studies for

silicon dioxide, tungsten, and copper polishing.

In oxide polishing (Fig. 13.50), water reacts with the wafer surface and con-

verts some Si-O-Si molecules to Si-OH. The hydrated sites are softer than the

original surface [216]. Figure 13.50 shows the variation in normalized material

removal rate with respect to the diffusion coefﬁcient of water and the applied

pressure. When using a high diffusion coefﬁcient, a higher material removal rate

13 Surface Treatment and Planarization 1005

Fig. 13.50 Normalized oxide

polishing rate vs. polishing

pressure for slurries of

various diffusion coefﬁcients

[216]. Reprinted with

Elsevier

was achieved, as the soft hydrated layer formed faster than it could be removed.

Under these conditions, the change in material removal rate with respect to applied

pressure gradually decreased with increasing pressure. In the low diffusion coefﬁ-

cient regime, lower material removal rates were observed. In this case, the material

removal rate depended primarily on the mechanical action of the abrasive particles,

resulting in near-Prestonian behavior. Figure 13.51 shows contours of the polish-

ing rate and process temperature for IC-1400 pads (top) and Politex pads (bottom)

in tungsten CMP. Polishing rate and process temperature increased with applied

pressure and table rotation rate.

Figures 13.52 and 13.53 demonstrate the dependency of polishing rate on table

speed and applied pressure in copper CMP. While the linear behavior is consistent

with the Preston Equation (13.53), close inspection of the curves reveals that the

Preston Equation is not applicable. The removal rate has a non-zero intercept at

both zero rotation rate and zero pressure. The modiﬁed Preston Equation (13.54)

accounts for these results.

Table 13.9 shows several examples of polishing condition setups for materi-

als used in MEMS fabrication. The platen speed refers to the table or pad speed,

whereas the carrier speed is the wafer rotation speed.

The Stribeck curve (Fig. 13.54) was developed to monitor tribological processes

[219]. The Sommerfeld number (S

) is deﬁned as

μU

pδ

eff

(13.55)

where μ is the viscosity of the lubricant, U is the relative velocity, p is the applied

pressure, and δ

eff

is the effective lubricant ﬁlm thickness.

In the three-body interface system, i.e., the wafer-slurry-pad system, t he solid

bodies may interact in three lubrication regimes, as shown in Fig. 13.54:(1)

1006 P. Lin e t al.

Fig. 13.51 Material removal rate and process temperature for t ungsten polishing with commercial

boundary lubrication (solid-solid contact), (2) partial lubrication (semi-direct con-

tact), or (3) hydrodynamic lubrication (hydroplanes interacting with each other). In

boundary lubrication, the wafer and pad are involved in solid-solid interaction, and

the material removal rate is determined by surface abrasion only. In this regime,

the transport of slurry under the wafer is poor, resulting in limited chemical activ-

ity. Also, the elevated temperature and aggressive abrasion of pad and particles can

cause severe surface damage on the polished substrate. In the mixed (or partial)

lubrication regime, a thin slurry ﬁlm partially supports the applied pressure, prevent-

ing aggressive abrasion of the polished surface. The thin slurry layer is beneﬁcial

13 Surface Treatment and Planarization 1007

Fig. 13.52 Effect of table

speed on copper polishing

rate with QCTT1010

commercial slurry and

Fe(NO

)

slurry. Polisher

settings: 0 in. oscillation,

210 ml/min slurry ﬂow rate,

SUBA IV pad and 30 KN/m

downward pressure [218].

Reprinted with permission.

Fig. 13.53 Effect of applied

pressure on copper polishing

rate using QCTT1010

commercial slurry and

Fe(NO

)

slurry. Polisher

settings: 0 in. oscillation,

210 ml/min slurry ﬂow rate,

SUBA IV pad and 35 rpm of

the table. Fe(NO

)

slurry:

0.005 M BTA, 0.1 M

Fe(NO

)

, pH 1.35, 100 nm

α-alumina particles [218].

Reprinted with permission.

for two reasons. First, it acts as lubricating agent and conducts heat away from the

surface; second, slurry transport is more efﬁcient when such a ﬂuid layer exists.

In the hydrodynamic (hydroplaning) regime, the applied load is completely sup-

ported by a thick slurry layer at the interface. This layer may s igniﬁcantly reduce the

material removal rate due to the low coefﬁcient of friction. Philipossan et al. [220]

investigated the effect of surfactant, abrasive size, abrasive content, wafer pressure,

and sliding velocity on the frictional and kinetic attributes of copper CMP. It was

shown that although abrasive content did not affect the tribological mechanism of

the process, abrasive size was a signiﬁcant factor. Surfactant-containing slurries dra-

matically reduced the coefﬁcient of friction. Wang et al. [221] studied the effect of

1008 P. Lin e t al.

Table 13.9 Examples of CMP settings for different materials on 200 mm wafer

Material

Platen speed

(rpm)

Carrier speed

(rpm)

Down

pressure

(psi)

Slurry ﬂow

(ml/min)

SiO2 95 87 3–5 200

W 75 70 4–7 200

Cu 85 75 1.5–2 200

Ta, TaN 100 100 1.5–2 200

Poly Si 50 50 2 200

NiFe 80 70 4–8 200

Fig. 13.54 Three modes of contact experienced during CMP [222]. Reprinted with permission.

pad grooves on slurry ﬂow at the pad-wafer interface. It was demonstrated that the

pad groove generally increased slurry ﬂow rate and slurry suction at the pad-wafer

interface.

13.7.2 Applications

Many MEMS fabrication techniques have been adopted from the ﬁeld of micro-

electronics manufacturing, while a signiﬁcant number of fabrication methods have

also been developed to fulﬁll functional requirements for mechanical, electri-

cal, optical, and sensor structures. Bulk micromachining, surface micromachining,

and micromolding are commonly used in MEMS fabrication. During these pro-

cesses, high surface topography is created and hinders subsequent processes such

as thin ﬁlm deposition and microlithography. Thus, CMP is an enabling technol-

ogy when smooth or planar surfaces are required. Planarization can be categorized

into three levels, as shown in Fig. 13.55: smoothing, local planarization, and global

planarization [208, 220, 223].

13 Surface Treatment and Planarization 1009

Fig. 13.55 Degree of

planarization in the CMP

process [208]. Reprinted with

John Wiley & Sons, Inc

The degree of planarity is determined by considering the geometry of the pol-

ished surface, as shown in Fig. 13.56. The planarity is ranked using the values of

planarization length R and planarization angle θ [224]:

• Surface smoothing: 0.1 μm < R < 2.0 μm and 30

◦

<θ.

• Local planarization: 2.0 μm < R < 100 μm and 0.5

◦

<θ<30

◦

• Global planarization: 100 μm << R and θ<0.5

◦

13.7.2.1 Smoothing and Local Planarization

Smoothing is the lowest level of planarization, in which sharp features are smoothed

and high aspect ratio holes are ﬁlled. For sub-micron metallization schemes, CMP

Fig. 13.56 Quantiﬁed

measurement of planarity

[224]. Reprinted with

ECS

1010 P. Lin e t al.

is utilized to smooth the surface and to ﬁll contact and via holes, avoiding poor step

coverage, which can lead to high current density and electromigration. In multi-

level metallization, simple smoothing is insufﬁcient, since uneven topography can

be cumulative through many metal layers. Therefore, local planarization must be

achieved.

13.7.2.2 Global Planarization

In the microelectronics industry, the critical dimensions of circuits are constantly

reduced as technology advances. This adds to the challenges of the lithography pro-

cess. In order to minimize the focusing inaccuracy, many enhancement techniques,

such as phase-shift masks and immersion lenses, are utilized along with deep UV

(193 nm wavelength) lithography tools. However, the introduction of these enhance-

ment techniques signiﬁcantly reduces the depth of focus in lithography. Typically,

lithography tools need to work at a depth of about 270 nm across a 20 mm by 20 mm

stepper ﬁeld. Smoothing or local planarization is not adequate in this regime, and

global planarization is required for successful patterning. With ﬁnite depth of focus

in lithography, any uneven topography and roughness will lead to a reduction in

focusing accuracy and inaccurate patterning [220]. Figure 13.57a, b show a com-

parison between planarized and non-planarized surface topography. In practice, the

pattern density within the die signiﬁcantly affects the results in global planariza-

tion. In order to avoid variations in removal rate or step height caused by varied

pattern densities, the selection of suitable consumables and process optimization

is essential. One method used to minimize variations in pattern density is to mix

dummy structures with the main patterns [225].

Fig. 13.57 Schematic of a MLM structure (a) without and (b) with planarization [226]. Reprinted

13 Surface Treatment and Planarization 1011

13.7.2.3 Trench Fill

Trench ﬁll technology was ﬁrst developed for microelectronics manufacturing.

LOCOS (local oxidation of silicon) and Shallow Trench Isolation (STI) are the

two main lateral isolation techniques. When dimensions are smaller than 0.25 μm,

the so-called “bird’s beak” in LOCOS limits its applications, and STI with CMP

is adopted as a replacement. The ﬁrst step of the STI process is etching of

the silicon substrate to form trenches; this process is followed by reﬁlling the

trenches with oxide. After the trenches are reﬁlled, CMP is used to remove

the overburden oxide and achieve a planar surface. The implementation of cop-

per interconnects on chips is realized by damascene technology. Damascene is

conceptually similar to STI technology, comprising trench etching, copper reﬁll,

and CMP.

MEMS technologies rely largely on developments in microelectronics man-

ufacturing. The above-mentioned technologies have thus found their way into

various MEMS applications. However, trenches in MEMS fabrication are much

deeper than those encountered in integrated circuit fabrication, and CMP pro-

cesses must be adjusted to fulﬁll MEMS-speciﬁc requirements. Three-dimensional

integration by chip stacking has recently gained much interest. Through-silicon

via (TSV) has been adopted as one possible solution to achieve vertical inter-

connections. TSV relies on the same basic concept as copper damascene, but

the vias are deeper and larger (20–100 μm in diameter) than the interconnect

trenches on chips. After the vias have been ﬁlled, the copper overburden is

removed by CMP; r equirements for this process are comparable to those in MEMS

applications [227].

13.7.3 Pads and Slurry

As discussed in Section 13.7.1.2 (Mechanics of CMP), pad, slurry, and wafer con-

stitute the most important three-body interfaces in the CMP process. CMP involves

both chemical and mechanical effects, and therefore polishing pads must have sufﬁ-

cient chemical inertness and mechanical resistance to survive the rigors of polishing.

The preferred mechanical properties for polishing pads include high strength (to

resist tearing during polishing), suitable hardness, and good abrasion resistance to

minimize pad wear during polishing and conditioning. In terms of pad chemistry,

the pad must be inert enough to survive aggressive slurry chemistries used in CMP

without becoming damaged through degradation or delamination. Another impor-

tant criterion is pad wettability. The pad must be hydrophilic, to ensure the spread

of slurry on the platen. Otherwise, the slurry will be swept away before forming the

hydroplane that allows the synergistic combination of chemical effects and mechan-

ical abrasion. Researchers have investigated a number of polymers as polishing

pad materials, including polyethylene, PTFE, and others. Polyurethane stands out

due to its durability, excellent chemical stability, and adaptability of properties and

micro/macro structures.

1012 P. Lin e t al.

There are four types of pads currently available, grouped by microstructure and

physical and mechanical properties:

Type I: Felts and polymer-impregnated felts

Type II: Porometrics (microporous synthetic leathers)

Type III: Filled polymer sheets (ﬁlms)

Type IV: Unﬁlled textured polymer sheets (ﬁlms)

Key features, properties and typical applications for the four main pad types are

summarized in Table 13.10.

The relationship between polishing performance and pad properties is com-

plex and not yet fully understood. First, polishing performance is measured by

several parameters that are not only related to pad properties, but are also depen-

dent on polished feature size and substrate size. Second, other factors such as

slurry (pH, abrasive size, additives), polishing tool (polisher, conditioner, retaining

ring), and polishing conditions (platen speed, ﬂow rate, pressure) also have sig-

niﬁcant effects on polishing results. Nevertheless, the major relationship between

pad properties and polishing performance are still important as guidelines in CMP

applications, and are summarized in Table 13.11. In practice, a stiff pad is preferred

Table 13.10 Key features, properties and applications for different pad types [228]

Type I Type II Type III Type IV

Structure Felted ﬁbers

impregnated

with

polymeric

binder

Porous ﬁlm

coated on

supporting

substrate

Microporous

polymer sheet

Nonporous

polymer sheet

with surface

macrotexture

Microstructure Continuous

channels

between ﬁbers

Vertically

oriented open

pores

Closed-cell foam None

Inherent

microtexture

High High Medium Low

Slurry holding Medium High Low Minimal

Example of

commercial

pads

Suba

STT 711

Pellon

Politex

Surﬁn

UR100

WWP3000

IC1000

IC1010

IC1040

FX9

OXP3000

OX4000

NCP-1

IC2000

Compressibility Medium High Low Very low

Stiffness/hardness Medium Low High Very high

Typical

applications

Si stock

polishing,

Tungsten CMP

Si ﬁnal polishing,

Tungsten

CMP, post

CMP buff

Si stock, ILD

CMP, STI,

metal

damascene

CMP

ILD CMP, STI,

metal dual

damascene

13 Surface Treatment and Planarization 1013

Table 13.11 Relationship between pad property and polishing performance [228]

Polishing scale

Pad property Wafer Die Feature Conditionability

Density

(porosity)

Removal rate,

nonuniformity

Defectivity Dishing, erosion Yes

Hardness Macroscratches Defectivity Defectivity,

roughness,

dishing,

erosion

Yes

Tensile strength Pad life Yes

Abrasion

resistance

Pad life Yes

Modulus

(stiffness)

Edge effects Planarization Yes

Thickness Pad life

Top pad com-

pressibility

Planarization Dishing

Pad texture Pad life, removal

rate,

nonuniformity,

edge effects

Pad roughness Removal rate,

nonuniformity

Planarization Dishing,

erosion

Yes

Hydrophilicity Removal rate Yes

to achieve ideal planarization and avoid unwanted results such as dishing in metal

polishing, which is related to pad bending. However, wafers are not perfectly ﬂat

and typically have some degree of curvature due to the stresses introduced dur-

ing manufacture and coefﬁcient of thermal expansion mismatch in the deposited

oxide and metal layers. Therefore, sufﬁcient pad ﬂexibility is required to account

for variability in wafer ﬂatness. The solution used in industry is to laminate a

stiff pad onto a ﬂexible base pad. One representative example of such a com-

bination is t he IC1000/SUBA IV pad, which is widely used in both oxide and

metal CMP.

Slurry plays a very important role in the CMP process. Though many advanced

technologies are currently employed to prepare high performance slurries, slur-

ries all consist of the same major components: a solution and an abrasive [223].

The abrasive in slurry mechanically abrades the wafer surface and removes sur-

face material. Chemical additives in the slurry react with surface material to enable

planarization of the substrate. Also, chemical additives work along with abra-

sives to minimize the redeposition of polishing debris onto the substrate. An ideal

slurry is expected to simultaneously produce a high material removal rate, few sur-

face defects (scratches, corrosion, and other defects), high wafer uniformity, and

high selectivity with respect to the underlying layers [228]. Other important slurry