24-10 Industrial Communication Systems
e.AFDX.network.architecture.is.composed.of.several.interconnected.switches..e.inputs.and.out-
puts
.of.the.network.are.the.end.systems.(the.little.circles.in.Figure.24.7)..Each.end.system.is.connected.to.
exactly.one.switch.port.and.each.switch.port.is.connected.to.either.an.end.system.or.another.switch..e.
links.are.all.full.duplex..In.Figure.24.7,.the.values.on.the.end.systems.indicate.the.number.of.VL.that.are.
dispatched.between.the.end.systems.and.a.given.switch..us,.the.VL.concept.of.virtual.communication.
channels.has.the.advantage.of.statically.dening.the.ows,.which.enter.the.network,.and.associating.
some.performance.properties.to.each.ow..Each.VL.can.be.statically.mapped.on.the.network.of.inter-
connected
.AFDX.switches..Transmitting.an.Ethernet.frame.from.one.end.system.to.another.is.based.
on.a.VL.identier,.which.is.used.for.the.deterministic.routing.of.each.VL.(the.switch.forwarding.tables.
are.statically.dened.aer.allocation.of.all.VL.on.the.AFDX.network.architecture)..Each.VL.denes.a.
logical.unidirectional.connection.from.one.source.end.system.to.one.or.more.destination.end.systems..
For.example,.Figure.24.8.illustrates.dierent.kinds.of.VL:.vx.is.a.unicast.VL.with.path.{e3−S3−S4−e8},.
while.v6.is.a.multicast.VL.with.paths.{e1−S1−S2−e7}.and.{e1−S1−S4−e8}.
A
.VL.denition.includes.the.bandwidth.allocation.gap.(BAG).value,.the.minimum.frame.size.(S
min
),.
and.the.maximum.frame.size.(S
max
)..e.BAG.is.the.minimum.delay.between.two.consecutive.frames.
of.the.associated.VL.(which.actually.denes.a.VL.as.a.sporadic.ow)..BAG.and.S
max
.values.guarantee.an.
allocated.bandwidth.for.each.VL..Moreover,.a.jitter.value.is.associated.to.each.VL.to.establish.an.upper.
bound.on.the.maximum.admissible.jitter.aer.multiplexing.dierent.regulated.VL.ows.
24.6.4 Virtual Link Properties
From.the.avionics.systems.designer’s.point.of.view,.classic.ARINC.429.buses.have.many.interesting.
features..For.example,.the.single-emitter.assumption.implies.a.dedicated.link.oered.to.the.emitter,.and.
thus.guaranteed.access.to.the.bus,.guaranteed.bandwidth,.and.high.determinism..Moreover,.the.com-
munication
.paradigm.used.by.many.avionic.applications.is.derived.from.the.ARINC.429’s.properties.
behavior,.which.has.been.generalized.on.IMA.through.APEX.port.paradigm.[ARI97]..is.explains.why.
the.VL.concept.is.of.importance.in.the.denition.of.AFDX;.it.allows.direct.replacement.of.ARINC.429.
buses,.on.a.deterministic.ARINC.664.network.
24.6.4.1
VL Bandwidth Guarantee
Each
.avionic.function.denes.its.VL.bandwidth.requirements.in.the.form.of.two.parameters:.the.BAG.
and.the.maximum.frame.size.(S
max
)..When.the.VL.has.no.jitter,.the.BAG.represents.the.minimum.
interval.between.the.rst.bits.of.two.consecutive.frames..us,.the.bandwidth.oered.to.a.VL.is.the.one.
obtained.when.emitting.a.maximum-sized.frame.every.BAG,.the.latter.being.specied.by.an.integer.(k),.to.
give.(create).a.2
k
.interval.(in.milliseconds)..e.minimal.BAG.is.thus.1.ms.for.k.=.0,.and.when.combined.
with.standard.maximum.Ethernet.frames,.the.maximum.bandwidth.oered.attributed.to.a.single.VL.
can.be.up.to.12.Mbps.
e
.network.integrator.collates.all.the.VL.bandwidth.requirements.and.veries.that.the.sum.of.VL.
bandwidths.on.any.physical.link.of.the.full-duplex.switched.Ethernet.network.does.not.exceed.the.
v7, v9
vx, v1
v2, v3
v1, v3
v6, v7
v6, v8, v 9
vx, v2
vx, v6, v7
v2, v5
v1, v3, v4
v5
S3
e5
e6
S1
S4
S5
S2
e7
e8
e9
e10
e
1
e2
e3
e4
v4
FIGURE 24.8 Example.of.AFDX.VLs.conguration.
© 2011 by Taylor and Francis Group, LLC