Wong H.-S.P., Akinwande D. Carbon Nanotube and Graphene Device Physics

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8.6 Ballistic CNFET performance parameters 209

(ii) Partially ballistic transport: This is deﬁned as transport with no acoustic

phonon scattering but possibly some optical phonon scattering (α<1).

The DOPS effect is expected to apply to ballistic FETs in general, including

silicon FETs.

Further research is warranted to investigate how the DOPS param-

eter scales with the device dimensions and semiconductor-contact dynamics, with

the potential that the results of such investigations might lead to optimizing the

device to minimize this effect. In the next section we will discuss and enumerate

the performance parameters of the ballistic CNFET.

8.6 Ballistic CNFET performance parameters

Many of the basic parameters that characterize transistor performance can now

be derived from the experimentally validated ballistic theory. This includes fun-

damental parameters such as the threshold voltage V

, the transconductance

= ∂I

/∂V

), and the channel conductance (g

= ∂I

/∂V

). In addition, the

sub-threshold current I

sth

and associated slope and the saturation or ON current

are of routine interest.

The threshold voltage for an FET is deﬁned as the gate voltage at which a

sufﬁcient amount of carriers are induced to create a conducting channel. Strictly

speaking, in silicon FETs, V

corresponds to the gate voltage where an inversion

layer is induced at the interface between the gate oxide and the silicon substrate.

For an intrinsic semiconductor, the threshold voltage takes on a somewhat vague

meaning because of the lack of carrier inversion, as is the case in conventional

doped semiconductors. To circumvent this ambiguity, we can deﬁne a threshold

voltage that does not rely on carrier inversion yet still have virtually the same prop-

erties characteristic of V

in conventional FETs. Mathematically, we deﬁne V

be the gate voltage at which the gradient of the transconductance is a maximum, as

shown in Figure 8.9a.

This deﬁnition is universally applicable to all CNFETs and

in general to all FETs based on an intrinsic semiconductor channel. Moreover, the

deﬁned V

can be directly determined from experimental measurements, avoiding

altogether the extraction ambiguities related to small-dimensional effects in the

conventional deﬁnition of V

K. Natori, Ballistic MOSFET reproduces current-voltage characteristics of an experimental

device. IEEE Electron Device Lett., 23 (2002) 655–7.

For example, the channel of a silicon n-FET is normally doped with holes; therefore, a

non-conducting path exists between the electron-doped S/D regions and the channel. To turn ON

the device, a positive gate voltage exceeding V

has to be applied to invert the channel from

p-type to n-type, leading to the creation of a conducting path.

This deﬁnition has been previously introduced for thin-oxide FETs. See H.-S. Wong, M H. White,

T. J. Krutsick and R. V. Booth, Modeling of transconductance degradation and extraction of

threshold voltage in thin oxide MOSFETs. Solid-State Electron., 30 (1987) 953–68.

210 Chapter 8 Carbon nanotube ﬁeld-effect transistors

(a) (b)

0.1

0.2

0.3

0.4

0.5

1 1.5 2 2.5 3

CNT diameter(nm)

Threshold voltage (V)

= 0.05

= 0.8

(V)

∂

/∂V

(arb.units)

∂g

/∂V

Fig. 8.9

(a) The graphical illustration of the deﬁnition of V

for CNFETs with an intrinsic channel.

(b) V

exactly computed from the analytical ballistic theory model for a ballistic 50 nm

n-type CNFET (derived from Figure 8.4) showing weak dependence on drain voltage and

a simple ∼0.5/d

relation.

Forann-CNFET,thethresholdvoltageisapproximatelygivenby

≈ k

T ln



+eαV

)/2k



24 + e

(eαV

)/k

− e

(eαV

)/2k



(8.29)

which can be further simpliﬁed (via a ﬁrst-order Taylor series expansion) to reveal

a relationship that is directly proportional to the bandgap and, hence, inversely

proportional to the nanotube diameter (since E

∼ 1/d

≈

+ offset. (8.30)

This relationship is conﬁrmedin Figure 8.9b (where theoffset is simply set tozero),

showing the V

computed exactly from the ballistic model compared with a simple

∼ 0.5/d

(V nm) relation with good agreement. A suite of analytical formulas

for basic transistor performance parameters are shown in Table 8.2, which the

reader is strongly encouraged to derive for intellectual satisfaction. The parameters

are easily derivable using elementary algebra and calculus. The sub-threshold

current is the current when V

< V

and is an increasingly important parameter

relevant to power dissipation and gate control in nanoscale electronics. Techniques

to extract the DOPS parameter and the bandgap or the ﬂatband voltage are also

enumerated in the table.

Much of the excitement about CNFETs concerns their potential performance

advantages over silicon transistors for nanoscale digital, analog, and radio-

frequency (RF) applications. For this reason, several workers have benchmarked

the performance of relatively ideal CNFETs to silicon FETs, and the consensus out-

look is that, qualitatively speaking, ballistic CNFETs offer superior performance to

8.6 Ballistic CNFET performance parameters 211

Table 8.2. Expressions for the key metrics of CNFETs and some parameter extraction techniques

# Analytical equations for ballistic n-type CNFET Comments/conditions

(1) I

≈

1 +e

(2eϕ

−E

)/2k

Saturation current in

active region (V

, V

> V

− V

)

(2) I

sth

≈

(2eV

−E

)/2k

− e

(2eV

−2αeV

−E

,2k

Sub-threshold current

with an ideal slope of

60 mV/decade at 300 K

< V

)

(3) V

= V

, when

∂g

∂V

= maximum Deﬁnition for V

for

intrinsic CNFETs

(4) V

≈ k

T ln



+αeV

)/2k

√

(αeV

)/k

+ 24 − e

(αeV

)/2k



Analytical V

in the limit

of ϕ

∼ V

(5) g

∂I

∂V



1 +e

(2eϕ

−2αeV

−E

)/2k

−

1 +e

(2eϕ

−E

)/2k



∂ϕ

∂V

Transconductance

(6) g

∂I

∂V

1 +e

+2αeV

−2eϕ

)/2k

−1

Channel conductance

(7) g

ds0

Technique to extract α

from g

→ 0,

→ V

)

(8) 2k

T ln



sth



= 2e(V

− V

) −E

Technique to extract E

from measured

sth

→ V

)

siliconFETsforcomparablechannellengthsandelectricalconditions.

14,15,25

The

actual quantitative performance advantage depends on the modeling details and

associated approximations. However, contemporary CNFETs that are frequently

fabricated do not represent the ideal ballistic CNFET; and, furthermore, any perfor-

mance beneﬁts begin to diminish when parasitic capacitances are included in the

device geometry.

At this moment, signiﬁcant advances are required to routinely

fabricate near-ideal nanotube FETs to realize their intrinsic electrical performance.

J. Guo, S. Hasan, A. Javey, G. Bosman and M. Lundstrom, Assessment of high-frequency

performance potential of carbon nanotube transistors. IEEE Trans. Nanotechnol., 4 (2005)

715–21; L. Wei, D. J. Frank, L. Chang and H.-S. P. Wong, A non-iterative compact model for

carbon nanotube FETs incorporating source exhaustion effects. IEEE IEDM Tech. Digest, (2009)

917–20.

N. Patil, J. Deng, S. Mitra and H.-S. P. Wong, Circuit-level performance benchmarking and

scalability analysis of carbon nanotube transistor circuits. IEEE Trans. Nanotechnol., 8 (2009)

37–45.

212 Chapter 8 Carbon nanotube ﬁeld-effect transistors

8.7 Quantum CNFETs

Carbon nanotube FETs can exhibit very novel properties when working in the

quantum capacitance limit, particularly in the active region of transistor operation.

These novel properties, as we shall see shortly, are quite unique and not observable

in conventional semiconductor FETs that possess a large DOS (such as silicon).

For brevity, we refer to a CNFET that satisﬁes the quantum capacitance limit in

all its regions of operation (sub-threshold, linear, and active) as a quantum FETs

in order to distinguish its unique properties from the conventional or classical

FET. The quantum capacitance limit entails that C

 C

, and hence ϕ

≈ V

Accordingly, the gate has maximum control of the electrical properties of the

channel in a quantum CNFET.

To actually realize a quantum CNFET requires that the oxide capacitance be

much greater, say about an order of magnitude greater, than the quantum capaci-

tance. It is worthwhile obtaining an estimate of the oxide capacitance to satisfy this

requirement. Continuing with our focus on low energies (i.e. only the ﬁrst subband

is considered), the maximum C

of semiconducting nanotubes is about a factor of

2 greater than the quantum capacitance of metallic nanotubes. That is, maximum

≈ 0.6 fF µm

−1

(see Chapter 6); therefore, C

needs to be >6fFµm

−1

Substituting ϕ

= V

into Eq. (8.28), the I −V expression of a quantum CNFET is

= I

1 + e

(±2eV

−E

)/2k

− ln

1 + e

(±2eV

∓2eαV

−E

)/2k

(8.31)

Consider the saturation current (say for an n-CNFET) given by

= I

1 + e

(2eV

−E

)/2k

≈

−

2eR

, (8.32)

where the approximation is valid for typical gate voltages and bandgaps. For

example, a CNT with a bandgap ∼0.6 eV has a threshold voltage of ∼0.3 V under

ﬂatband conditions. At room temperature, for V

> 0.35 V, the exponential term

is ∼ 54.6  1. Since the current is linear with voltage, the transconductance is a

constant:

≈

(8.33)

In principle, this can be realized by a 10 nm thin dielectric with k > 350. However, at present, it

is not at all certain that this value of oxide capacitance on a CNT is achievable. Most higher k

metal oxides, such as various types of titanates, have a thickness-dependent k which can exceed

1000 for thick ﬁlms, but often drops below 200 for t

< 50 nm. At the same time, such higher k

dielectrics have the undesirable effect of preferentially screening the drain ﬁeld through the

dielectric. See D. Frank et al. in footnote 35.

8.8 Schottky-barrier ballistic CNFETs 213

0 2 0.4 0.6 0.8 1

100

125

150

175

154.2

25 50 75 100

T (°C)

125 150 175 200

154.4

154.6

154.8

155

(V)

(µS)

(a)

(b)

Fig. 8.10 Novel and highly desirable properties of the quantum CNFET. (a) The transconductance

dependence on V

revealing a ﬂat response in the active region over a wide range of

voltages (at 300 K). (b) Temperature proﬁle of g

, showing less than 1 % variation up to

150

◦

C. For this example, E

= 0.5 eV, V

= 1V,V

= V

/2, and α = 0.5.

This is a remarkable result in contrast with conventional FETs, where the

transconductance in the active region can generally be expressed as a power series

function of the small-signal gate voltage in the form g

≈ a

+···,

where v

is the small-signal gate voltage.The constant transconductance of a quan-

tum CNFET is actually preferable, particularly for analog and RF circuits, where

much effort is often devoted to suppressing the gate dependence of the transcon-

ductance in classical FETs that inevitably leads to signal distortion at large signal

amplitudes.

In addition, the transconductance of the quantum CNFET also con-

tains no explicit dependence on temperature, a property which is highly desirable

in analog/RF circuits. The actual state of affairs regarding the transconductance

proﬁle of a quantum CNFET is shown in Figure 8.10. For this example, we have

employed the actual I−V expression in Eq. (8.31) to get an accurate outlook on

the proﬁle of g

. The roll-off of the transconductance at higher gate voltages is

because the semiconducting CNT is becoming more metallic-like.

8.8 Schottky-barrier ballistic CNFETs

Carbon nanotube FETs with Schottky (source/drain) metal contacts are frequently

the type of CNFETs commonly encountered in practice not by intention or design,

but simply because it is far easier to obtain Schottky contacts to semiconduct-

ing nanotubes instead of the more desirable ohmic kind. This is because it takes

a great deal more diligent effort to engineer the metal–nanotube interface to be

Common circuit techniques include ratiometric circuits and feedback or feedforward circuits. For

an insightful discussion of distortion and linearity in analog/RF integrated circuits, see T. H. Lee,

The Design of CMOS Radio-Frequency Integrated Circuits, 2nd edn (Cambridge University

Press, 2004) Chapter 12.

214 Chapter 8 Carbon nanotube ﬁeld-effect transistors

transparent to charge carriers. Moreover, routine fabrication process conditions

appear to conspire to favor Schottky barriers more often than not.

As a result, it

is important to understand the device physics and I −V characteristics of Schottky-

barrier CNFETs. A welcome bonus from this endeavor is that the understanding

gained deeply broadens our intuition about Schottky-barrier nanoscale transistors

in general, including CNR transistorsand semiconductor nanowire transistors.And

in fact, understanding of Schottky-barrier device physics is necessary to under-

stand (undesired) leakage current and the implications for ON/OFF current ratio

in (metal) ohmic-contact ballistic CNFETs and similar 1D ballistic FETs, as will

become evident in the course of the narrative.

The presence of Schottky barriers introduces substantial complexity in describ-

ing charge transport in the nanotube transistor owing to the inherently rich device

physics. As such, it is quite easy to get lost or lose focus of the central device

physics. This is especially true for the beginning student reader in this subject

matter. For this reason, the discussion will be more of a gentle and simple intro-

duction to Schottky-barrier nanotube transistors, with primary coverage of the

basic transistor physics and the current–voltage characteristics. References will be

provided along the way for advanced studies.

We begin our studies of Schottky-barrier CNFETs by exploring the bias-

dependent band diagrams in order to obtain basic qualitative insight about charge

transport. The use of band diagrams is essential in understanding and discussing

charge dynamics in these transistors. For convenience, we focus our attention on an

n-type transistor operation in the ballistic regime with a mid-gap Schottky barrier

and zero ﬂatband voltage,

conditions which are much easier to handle analyti-

cally and still provide us with the wealth of basic insights that are usually valid

and can be adapted to explain charge transport under general conditions.

Figure 8.11 illustrates the band diagrams under different bias conditions, where

the primary role of the gate voltage is to modulate the barrier thickness for electron

tunneling, and the role of the (positive) drain voltage is to rigidly lower the barrier

height at the drain electrode. The basic ideas regarding ballistic transport in ohmic-

contact CNFETs apply here with the additional effects of quantum mechanical tun-

neling that must be properly accounted for. In a sense, the transistor can be consid-

ered as two Schottky barriers connected by a ﬁeld-free region in the channel of the

nanotube.We considerlow-energy transport, whichincludes only the ﬁrstsubband.

Different bias conditions applied to the transistor can produce a diversity of

charge transport phenomena, including source and drain electron tunneling in the

Indeed, a search of published experimental nanotube transistors in one’s favorite journals will

unambiguously show that the vast majority (but not all) of CNFETs fabricated under different

permutations of metal contacts, process conditions, and nanotube diameters produce

Schottky-barrier CNFETs. Intuitively, metal workfunction and process and ambient conditions all

play a role, but the degree of their inﬂuence in experimental devices remains unclear.

In optimized device designs, the gate metal (and associated workfunction) is carefully selected to

set the ﬂatband voltage and, hence, the threshold voltage. The metal contacts are also chosen

diligently to control the Schottky-barrier height.

8.8 Schottky-barrier ballistic CNFETs 215

(a) (b)

> V

= V

> V

= V

– eV

=0, V

> V

Fig. 8.11 Band diagrams of a ballistic n-CNFET with a mid-gap Schottky barrier under selected

bias conditions (ϕ

is the Schottky barrier height for electrons). (a) Band diagram in the

linear region. The net current is the difference between electrons tunneling from the

source and those tunneling from the drain. (b) The transistor ON state, where current is

supplied from electrons tunneling from the source. (c) Band diagram in the OFF state.

Note the valence band symmetry with the conduction band of (b). As a result, the current

from holes tunneling from the drain will be identical to electron current in (b) for the same

. (d) Interesting bias conditions leading to symmetrical conduction and valence band

proﬁle and, hence, equal electron and hole currents.

linear region (Figure 8.11a) and electron source tunneling in the active or ON

region (Figure 8.11b). Intriguingly, we discover it is difﬁcult to turn off the tran-

sistor (OFF bias is conventionally deﬁned as V

= 0 V, and V

= V

). In fact,

for the device conditions under examination (V

= 0 V, and a mid-gap Schottky

barrier), at V

= 0 V, hole tunneling from the drain to the source results in current

that is equal to the ON current when V

= V

. This instantly implies that the

Schottky-barrier CNFET is fundamentally an ambipolar transistor, with electrons

providing the bulk of the current above a critical gate voltage and holes respon-

sible for the current below the critical V

On deeper thought, we expect the

These conclusions continue to hold for arbitrary Schottky-barrier heights, even including the

special case of a vanishing ϕ

(a CNFET with transparent contacts which was the subject of

previous sections). The effect of arbitrary Schottky-barrier heights is primarily to modify the

magnitude of the ON and OFF currents and shift the position of the critical V

. The overall

216 Chapter 8 Carbon nanotube ﬁeld-effect transistors

-x/ λ

–eV

– eV

- ew

source/drain tunneling

source tunneling

thermionic emission

Fig. 8.12 The conduction band proﬁle of a Schottky-barrier CNFET showing the source/drain

tunneling and reﬂection processes and the thermionic component of current from

high-energy electrons. E

= 0 eV for reference.

critical gate voltage to correspond to the case when the electron and hole currents

must be equal. Indeed, we can construct a band diagram that is consistent with this

electron–hole current symmetry, as shown in Figure 8.11d, where the critical gate

voltage or symmetry point is determined to be V

= V

/2. With these qualitative

insights it is possible to forecast the general I

−V

proﬁle of the Schottky-barrier

CNFET without actually writing a single equation. In the OFF state, hole tunnel-

ing produces substantial current, which reduces as V

increases. At the symmetry

point, electron tunneling equals hole tunneling and the current in the transistor

is at a ﬁnite minimum. For further increases in V

, electron tunneling provides

increasing current, which reaches a maximum at V

= V

. Stated differently, for

a ﬁxed V

, the hole current increases with V

−V

in exactly the same manner as

the electron current increases with V

.All in all, a sketch of the I

−V

is expected

to more or less reveal a V-shaped proﬁle.

A quantitative semi-analytical model of transport in Schottky-barrier CNFETs

that is especially beneﬁcial for nurturing intuition can be developed by employ-

ing the Landauer–Büttiker formalism where the Schottky barriers are treated as

scattering sites near the contacts.

Inside the channel, transport is ballistic and

ambipolar nature is still preserved. See J. Guo, S. Datta and M. Lundstrom, A numerical study of

scaling issues for Schottky-barrier carbon nanotube transistors. IEEE Trans. Electron Devices, 51

(2004) 172–7. Note that, in CNFETs with a ﬁnite V

, the ambipolar feature may not be visible

within a limited gate voltage sweep, but inevitably becomes observable for a larger range.

The theory of Schottky-barrier CNFETs often involves a set of assumptions and approximations.

In the present treatment, our goal is to create a simple physics-based model that predicts the

correct qualitative features while retaining reasonable accuracy.

8.8 Schottky-barrier ballistic CNFETs 217

equilibrium conditions apply. The contact themselves are considered to be reser-

voirs of electrons at (or near) thermal equilibrium and, hence, the use of the

equilibrium Fermi–Dirac distribution is valid. Furthermore, we consider only the

case where the mobile electrons have arbitrary or random phase. For this reason,

constructive or destructive interference from multiple coherent scattering at the

two tunneling barriers, which can lead to resonant tunneling phenomena,

can

be neglected in the CNFET model. The neglect of interference is reasonable for

currently achievable short channel lengths (tens of nanometers). However, at much

shorter channel lengths roughly comparable to the thickness of the tunnel barriers,

resonant tunneling effects become increasingly important.

We develop the Schottky-barrier CNFET model in simple stages of increas-

ing detail, in line with the gentle introduction which is our driving philosophy.

First, we state the formula for the Schottky-barrier ballistic current, then eluci-

date on the effective tunneling probabilities of mobile charges, and ﬁnally we will

focus on developing an analytical expression for the tunneling probabilities appli-

cable to CNFETs. This modeling strategy offers a seamless transition between

Schottky-barrier CNFETs and ohmic-contact CNFETs discussed in the previous

sections. The electron current I

can be expressed following the Landauer–Büttiker

formalism,

∞



−eϕ

[

(E)F(E, E

) − T

(E)F(E, E

− eV

)

]

dE (8.34)

where T

is the source to drain transmission probability or coefﬁcient of an

electron-wave propagating from the source to the drain, successfully through both

Schottky barriers, and vice versa for T

. This expression essentially has the same

form has the previously discussed ballistic current integral, Eq. (8.21), but mod-

iﬁed by the transmission probabilities. The transistor drain current is the sum of

the electron and hole currents. We will explore the electron current for now in

order to develop expressions for the tunneling probabilities; subsequently, it is a

straightforward matter to write the expression for the hole current.

Let us consider an electron already in the channel, propagating to the drain.

The pressing question is: What is the transmission probability of this electron

propagating to the drain reservoir? Let us call this channel to drain transmission

probability T

. Furthermore, electrons that do not tunnel through the barrier are

reﬂected backwards. We can label the transmission and reﬂection coefﬁcients at

the source and drain as T

, 

and T

, 

respectively (see Figure 8.12). It follows

J. Singh, Quantum Mechanics: Fundamentals & Applications to Technology (John Wiley, 1997).

S. Datta, Electronic Transport in Mesoscopic Systems (Cambridge University Press, 1995).

218 Chapter 8 Carbon nanotube ﬁeld-effect transistors

that T

is a sequential sum of a series of scattering events:

= T

+ 



+ (



)

+ (



)

+···+(



)

= T



1 +



(



)



. (8.35)

Likewise, the total probability that the electron will be reﬂected into the source

reservoir 

is a sum of events:



= 

+ 



+ 



+···+



n−1





(



)

. (8.36)

Owing to charge conservation (i.e. the electron can be found either at the source

or drain with a certain probability), the transmission and reﬂection coefﬁcients are

related by

+ 

= 1. (8.37)

Substituting Eq. (8.36) for 

, the channel to drain transmission probability in

terms of T

and T

simpliﬁes to

= 1 −





(



)

= 1 −



− T

)

+ T

− T

. (8.38)

Therefore, it follows that the source to drain transmission probability is T

multiplied by the source transmission probability:

+ T

− T

= T

eff

. (8.39)

Note that the symmetry involving T

and T

in the expression immediately implies

that T

= T

. To retain this symmetry in the symbolic notation, T

eff

will be used

hereafter. The electron current can now be stated as

∞



−eϕ

eff

− F

)dE, (8.40)