204 Chapter 8 Carbon nanotube field-effect transistors
gate voltage in controlling the channel charge. V
D
is the other external influence
by which charge transport can be controlled. The first term is the current from the
right-moving carriers, while the latter term is due to the left-moving carriers. An
important observation is that the current from the backward carriers is significant
in the linear region of the transistor I
D
−V
D
. The current from the forward carriers
determines the saturation current, also known as the ON current I
ON
, because at
high V
D
the latter term becomes negligible and the current saturates independent of
V
D
. We can obtain a rough estimate for the maximum I
ON
by reasonably assuming
that the maximum surface potential (in the low-energy ballistic regime) is slightly
greater than the energy minima of the first subband, say eϕ
s
∼ 1.5E
cb
= 0.75E
g
.
In this case, for d
t
from 1–3 nm at room temperature, the maximum first subband
I
ON
is within a factor of 2 of 24 µA. For a p-CNFET, Eq. (8.22) is modified by
reversing the polarity of ϕ
s
and V
D
.
I
D
= I
o
%
ln
#
1 + e
−(2eϕ
s
+E
g
)/2k
B
T
$
− ln
#
1 + e
(2eV
D
−2eϕ
s
−E
g
)/2k
B
T
$&
. (8.24)
The surface potential appropriate for a three-terminal device such as the CNFET
is slightly different from Eq. (8.1) defined in the previous section, which was
based on a two-terminal device structure where the source and drain are shorted
together. For the two-terminal device all the induced charges effectively travel
in the same direction, leading to a displacement current, and the purpose of the
surface potential is to account for all the induced charges in the nanotube. For the
case of a three-terminal device such as the n-type CNFET, at equilibrium, half
of the mobile electrons are right-moving carriers and the remaining half are left-
moving carriers. Hence, the appropriate surface potential to be used for a CNFET
(Eqs. (8.22)or(8.24)) must account for the charge carriers per direction in the
nanotube. That is, for example, the surface potential in the first or latter term of
Eq. (8.22) should account for only half of the induced charges, since those are the
charges moving with positive or negative velocities respectively. In this case, the
proper definition for the surface potential for CNFETs is
ϕ
s
=
C
ox
C
ox
+
C
q
(ϕ
s
)
2
V
G
=
2C
ox
2C
ox
+ C
q
(ϕ
s
)
V
G
(8.25)
where the factor of 2 represents the fact that only half the charges are traveling in
any particular direction at any gate voltage with V
D
= 0. This is, of course, similar
to Eq. (8.1); as such, the analytical expression developed for the surface potential
(Eq. (8.13)) can still be employed with C
ox
replaced with 2C
ox
in the expressions
for the model parameters, s and t. Under excitation, the role of a finite V
D
is to
suppress the backward carriers in a CNFET.
An additional concern that needs to be incorporated in a general formulation
for the surface potential is the flatband voltage V
FB
.
16
All along we have been
16
In a nutshell, the flatband voltage is the voltage applied to the gate to get a flat energy band
diagram along the vertical cross-section of the device, and is given by V
FB
=
MS
where
MS
is