Gibilisco S. Teach Yourself Electricity and Electronics

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Extremely High Input Impedance

When the MOSFET was first developed, it was called an insulated-gate FET or IGFET. That’s still

a good name for it. The gate electrode is insulated from the channel by a thin layer of dielectric ma-

terial. As a result, the input impedance is even higher than that of a JFET. The gate-to-source resist-

ance of a typical MOSFET is, as a matter of fact, comparable to that of a typical capacitor! This

means that a MOSFET draws essentially no current, and therefore no power, from the signal source.

This makes the device ideal for low-level and weak-signal amplifiers. But MOS devices aren’t quite

perfect. They have an Achilles heel. They are electrically fragile.

The MOSFET 371

23-8 At A, pictorial diagram of a P-channel MOSFET. At B, the

schematic symbol. Electrodes are S = source, G = gate, and

D = drain.

23-7 At A, pictorial diagram of an N-channel MOSFET. At B, the

schematic symbol. Electrodes are S = source, G = gate, and

D = drain.

Beware of Static!

The trouble with MOSFETs is that they can be easily damaged by electrostatic discharges. When

building or servicing circuits containing MOS devices, technicians must use special equipment to

ensure that their hands don’t carry electrostatic charges that might ruin the components. If a dis-

charge occurs through the dielectric of a MOS device, the component is permanently destroyed.

Warm and humid climates do not offer total protection against the hazard. This author learned that

fact by ruining several MOSFETs while designing circuits in the summertime—in Miami, Florida!

Flexibility in Biasing

In electronic circuits, an N-channel JFET can sometimes be replaced directly with an N-channel

MOSFET, and P-channel devices can be similarly interchanged. But the characteristic curves

for MOSFETs are not the same as those for JFETs. The main difference is that the S-G junction in

a MOSFET is not a P-N junction. Therefore, forward breakover cannot occur. A gate bias voltage,

, more positive than +0.6 V can be applied to an N-channel MOSFET, or an E

more negative

than −0.6 V to a P-channel device, without a current leak taking place.

A family of characteristic curves for a hypothetical N-channel MOSFET is shown in the graph

of Fig. 23-9.

Depletion Mode versus Enhancement Mode

Normally the channel in a JFET is wide open; as the depletion region gets wider and wider, chok-

ing off the channel, the charge carriers are forced to pass through a narrower and narrower path.

This is known as the depletion mode of operation for a field effect transistor. A MOSFET can also

372 The Field Effect Transistor

23-9 A family of

characteristic curves

for a hypothetical

N-channel MOSFET.

be made to work in the depletion mode. The drawings and schematic symbols of Figs. 23-7 and

23-8 show depletion-mode MOSFETs.

Metal-oxide semiconductor technology also allows an entirely different means of operation. An

enhancement-mode MOSFET normally has a pinched-off channel. It is necessary to apply a bias

voltage, E

, to the gate so that a channel will form. If E

= 0 in an enhancement-mode MOSFET,

then I

= 0 when there is no signal input. The schematic symbols for N-channel and P-channel

enhancement-mode devices are shown in Fig. 23-10. Note that the vertical line is broken. This is

how you can recognize an enhancement-mode device in circuit diagrams.

Common Source Circuit

There are three different circuit hookups for FETs, just as there are for bipolar transistors. These

three arrangements have the source, the gate, or the drain at signal ground. In the common source

circuit, the source is placed at signal ground. Signal input is applied to the gate. The general config-

uration is shown in Fig. 23-11. An N-channel JFET is used here, but the device could be an

Common Source Circuit 373

23-10 Schematic symbols

for enhancement

mode MOSFETs. At

A, the N-channel

device; at B, the

P-channel device.

23-11 Common source configuration. This diagram shows an N-channel

JFET circuit.

N-channel, depletion-mode MOSFET and the circuit diagram would be the same. For an

N-channel enhancement-mode device, an extra resistor would be necessary, running from the gate

to the positive power supply terminal. For P-channel devices, the supply would provide a negative,

rather than a positive, voltage.

Capacitor C

and resistor R

place the source at signal ground while elevating the source above

ground for dc. The ac signal enters through C

. Resistor R

adjusts the input impedance and pro-

vides bias for the gate. The ac signal passes out of the circuit through C

. Resistor R

keeps the out-

put signal from being shorted out through the power supply. The circuit of Fig. 23-11 is the basis

for low-level RF amplifiers and oscillators.

The common source arrangement provides the greatest gain of the three FET circuit configu-

rations. The output is 180° out of phase with the input.

Common Gate Circuit

In the common gate circuit (Fig. 23-12), the gate is placed at signal ground. The input is applied to

the source. The illustration shows an N-channel JFET. For other types of FETs, the same consider-

ations apply as previously described for the common source circuit. Enhancement-mode devices

would require a resistor between the gate and the positive supply terminal (or the negative terminal

if the MOSFET is P-channel).

The dc bias for the common gate circuit is basically the same as that for the common source

arrangement. But the signal follows a different path. The ac input signal enters through C

. Resis-

tor R

keeps the input from being shorted to ground. Gate bias is provided by R

and R

. Capacitor

374 The Field Effect Transistor

23-12 Common gate configuration. This diagram shows an N-channel

JFET circuit.

places the gate at signal ground. In some common gate circuits, the gate is directly grounded,

and R

and C

are not necessary. The output signal leaves the circuit through C

. Resistor R

keeps

the output signal from being shorted through the power supply.

The common gate arrangement produces less gain than its common source counterpart. But a

common gate amplifier is not likely to break into unwanted oscillation, making it a good choice for

power-amplifier circuits, especially at RF. The output is in phase with the input.

Common Drain Circuit

A common drain circuit is shown in Fig. 23-13. In this circuit, the collector is at signal ground. It is

sometimes called a source follower. The FET is biased in the same way as for the common source and

common gate circuits. In the illustration, an N-channel JFET is shown, but any other kind of FET

could be used, reversing the polarity for P-channel devices. Enhancement-mode MOSFETs would

need a resistor between the gate and the positive supply terminal (or the negative terminal if the

MOSFET is P-channel).

The input signal passes through C

to the gate. Resistors R

and R

provide gate bias. Resistor

limits the current. Capacitor C

keeps the drain at signal ground. Fluctuating dc (the channel

current) flows through R

as a result of the input signal; this causes a fluctuating dc voltage to ap-

pear across R

. The output is taken from the source, and its ac component passes through C

The output of the common drain circuit is in phase with the input. This scheme is the FET

analog of the bipolar common collector arrangement. The output impedance is rather low, making

this circuit a good choice for broadband impedance matching.

Common Drain Circuit 375

23-13 Common drain configuration, also known as a source follower. This

diagram shows an N-channel JFET circuit.

Quiz

Refer to the text in this chapter if necessary. A good score is at least 18 correct. Answers are in the

back of the book.

1. The current through the channel of a JFET is directly affected by all of the following, except the

(a) drain voltage.

(b) transconductance.

(d) gate bias.

2. In an N-channel JFET, pinchoff occurs when the gate bias is

(a) small and positive.

(b) zero.

(d) large and negative.

3. The current consists mainly of holes when a JFET

(a) has a P-type channel.

(b) is forward-biased.

(d) is reverse-biased.

4. A JFET might work better than a bipolar transistor in

(a) a high-voltage rectifier.

(b) a weak-signal RF amplifier.

(d) a power transformer.

5. In a P-channel JFET,

(a) the drain is forward-biased.

(b) the source-gate junction is forward-biased.

(d) the gate must be at dc ground.

6. A JFET is sometimes biased at or beyond pinchoff in

(a) a power amplifier.

(b) a rectifier.

(d) a weak-signal amplifier.

7. The gate of a JFET exhibits a

(a) forward bias.

(b) high impedance.

376 The Field Effect Transistor

(d) low avalanche voltage.

8. Which of the following conditions is not normally desirable in a JFET?

(a) A conducting channel

(b) Holes as the majority carriers

(d) A high input impedance

9. When a JFET is pinched off,

(a) the value of dI

/dE

is very large with no signal input.

(b) the value of dI

/dE

might vary considerably with no signal input.

/dE

is negative with no signal input.

(d) the value of dI

/dE

is zero with no signal input.

10. Transconductance is the ratio of

(a) a change in drain voltage to a change in source voltage.

(b) a change in drain current to a change in gate voltage.

(d) a change in drain current to a change in drain voltage.

11. Characteristic curves for JFETs generally show

(a) drain voltage as a function of source current.

(b) drain current as a function of gate current.

(d) drain voltage as a function of gate current.

12. A disadvantage of MOS components is the fact that

(a) they can be easily damaged by static electricity.

(b) they need a high input voltage in order to amplify.

(d) they produce a great deal of heat.

13. The input impedance of a MOSFET is

(a) lower than that of a JFET.

(b) lower than that of a bipolar transistor.

(d) extremely high.

14. A significant difference between MOSFETs and JFETs is the fact that

(a) MOSFETs can handle a wider range of gate bias voltages.

(b) MOSFETs can deliver greater output power.

(d) MOSFETs last longer.

Quiz 377

15. The channel in a zero-biased JFET is normally

(a) pinched off.

(b) in a state of avalanche breakdown.

(d) made of P-type semiconductor material.

16. When an enhancement-mode MOSFET is at zero bias,

(a) the drain current is high with no signal.

(b) the drain current fluctuates with no signal.

(d) the drain current is zero with no signal.

17. An enhancement-mode MOSFET can be recognized in schematic diagrams by the presence of

(a) an arrow pointing inward.

(b) a broken vertical line inside the circle.

(d) a solid vertical line inside the circle.

18. In a source follower, which of the electrodes receives the input signal?

(a) Any of them (doesn’t matter)

(b) The source

(d) The drain

19. Which of the following circuits produces an output signal wave that is 180° out of phase with

the input signal wave?

(a) The common source circuit

(b) The common gate circuit

(d) All of the above

20. Which of the following circuits can produce the greatest signal gain (amplification factor)?

(a) The common source circuit

(b) The common gate circuit

(d) All of the above circuits can amplify to the same extent.

378 The Field Effect Transistor

NOW THAT YOU’VE LEARNED THE BASICS OF BIPOLAR AND FIELD EFFECT TRANSISTORS, YOU’RE READY

to learn about amplifiers and oscillators that use these devices. As a prelude to that, let’s define the

most common unit that engineers use to evaluate changes in signal strength.

The Decibel

The human senses of hearing and vision don’t perceive the intensity of sound and light in a linear

manner. Instead, our perception of these phenomena is logarithmic. Electronic circuits behave in a

similar way when subjected to signals that change in amplitude. Because of this, scientists and engi-

neers invented a unit called the decibel (symbolized dB), in which amplitude changes are expressed

according to the base-10 logarithm of the actual change.

More or Less?

In the decibel scheme, increases in amplitude are assigned positive gain values, and decreases in am-

plitude are assigned negative gain values. A negative gain figure is sometimes expressed as a loss by re-

moving the minus sign.

If the output signal amplitude from a circuit is +6 dB relative to the input signal amplitude,

then the output is stronger than the input. If the output is at −14 dB relative to the input, then the

output is weaker than the input. In the first case, the circuit has a gain of +6 dB. In the second case,

we can say that the circuit has a gain of −14 dB or a loss of 14 dB.

How large a unit is the decibel, anyway? The answer is that it has no absolute size; it is a rela-

tive unit. The decibel has meaning only when two or more signals are compared. An amplitude in-

crease or decrease of plus or minus one decibel (⫾1 dB) is roughly the smallest change a listener can

detect if the change is expected. If the change is not expected, the smallest difference a listener can

notice is about ⫾3 dB.

379

CHAPTER

Amplifiers and Oscillators

For Voltage

Consider a circuit with an rms ac input voltage of E

and an rms ac output voltage of E

out

, specified

in the same units as E

. Then the voltage gain of the circuit, in decibels, is given by this formula:

Gain (dB) = 20 log(E

out

)

The base-10 logarithm of a value x is written log x. Log functions of base 10 and base e (another

type of logarithm sometimes used in physics and engineering) can be determined easily using scien-

tific calculators. From now on, when we say “logarithm,” we mean the base-10 logarithm unless

otherwise specified.

Problem 24-1

Suppose a circuit has an rms ac input of 1.00 V and an rms ac output of 14.0 V. What is the gain in

decibels?

First, find the ratio E

out

. Because E

out

= 14.0 V rms and E

= 1.00 V rms, the ratio is

14.0/1.00, or 14.0. Next, find the logarithm of 14.0. This is about 1.146128036. Finally, multiply

this number by 20, getting something like 22.92256071. Round this off to three significant figures,

because that’s all you’re entitled to, getting 22.9 dB.

Problem 24-2

Suppose a circuit has an rms ac input voltage of 24.2 V and an rms ac output voltage of 19.9 V.

What is the gain in decibels?

Find the ratio E

out

= 19.9/24.2 = 0.822... . (The three dots indicate extra digits introduced

by the calculator. You can leave them in until the final roundoff.) Find the logarithm of this: log

0.822...=−0.0849... . The gain is 20 times this, or −1.699...dB, which rounds off to −1.70 dB.

For Current

Current gain or loss is calculated in the same way as voltage gain or loss. If I

is the rms ac input cur-

rent and I

out

is the rms ac output current specified in the same units as I

, then:

Gain (dB) = 20 log(I

out

)

For Power

The power gain of a circuit, in decibels, is calculated according to a slightly different formula. If P

is the input signal power and P

out

is the output signal power expressed in the same units as P

, then:

Gain (dB) = 10 log (P

out

)

The coefficient (that is, the factor by which the logarithm is to be multiplied) in the formula for

power gain is 10, whereas for voltage and current gain it is 20.

Problem 24-3

Suppose a power amplifier has an input of 5.03 W and an output of 125 W. What is the gain in

decibels?

380 Amplifiers and Oscillators