Index 667
performance, 571–572
performance bounds on, 572–574
Shuffle function, 517
Simple traffic models (point processes), 383
S(n)usingz-transform, finding, 607–611
Software, 478
networking components, examples, 478
Space division switching, 510
SR ARQ protocol, see Selective-repeat (SR
ARQ) protocol
Standard deviation ,15
State of occupancy
packet buffer, 283–284, 290
token buffer, 283, 290
State transition diagram
for ALOHA channel, 331
for 802.11 channel, 355
for CSMA/CA, 347
for discrete-time M/M/1 queue, 228
of sending station using GBN ARQ error
control protocol, 310
sending station using SR ARQ error control
protocol, 318
State transition matrix
constructing, P, Markov chains, 81–82
State vector, see Distribution vector
Static priority (SP) scheduler, 439
Stationary random processes, 56–57
ergodic, 57
properties, 56
Steady state
finding distribution vector s, 124–125
significance of s, 123–124
Stochastic processes, 49
Stop-and-wait ARQ (SW ARQ) protocol,
303–304
modeling stop-and-wait ARQ, 305–306
SW ARQ performance, 306–308
Switches, 478, 579–580
basic performance measures, 491–492
classifications, 492
comparision, 574–576
components, 486–487, 487
control section, 488–489
datapath, 489
lookup table design, 489–490
Network Processing Unit (NPU),
487–488
switch fabric, 489
designing approaches, 579–580
functions, 490
input queuing, 493, 552–555
arrival and departure probabilities for
one queue of, 553
assumptions for analysis of, 552
congestion in, 555
efficiency of, 554
performance bounds on, 555–558
potential causes for packet loss, 494
modeling VRQ switch, 585–587
analysis of input buffer, 587–589
analysis of output queue, 589–591
performance bounds on VRQ switch,
591–593
multiple input/output queuing, 499–500
multiple input queuing, 497–498
multiple output queuing, 498–499
output queuing, 494–495, 558–559
assumptions for analysis of, 558
modeling input buffer, 559–561
modeling output queue, 561–562
output queue performance, 563–565,
566–569
potential causes for packet loss, 496
transition matrix, 562–563
Promina 4000 switch, 580–581
backplane bus operation, 581
features, 582
Input Port Operation, 581
output port operation, 581
versus VRQ switch, 584–585
scheduler location in, 432–434
shared buffer, 496–497, 569–572
assumptions for analysis of, 569
performance, 571–572
performance bounds on, 572–574
switch functions, 490
congestion control, 491
routing, 490
scheduling, 491
traffic management, 490–491
switch performance measures, 491–492
virtual routing/virtual queuing (VRQ),
500–502
VRQ switch, 582–583
backplane bus operation, 583
features, 584
input port operation, 583
output port operation, 583
Switches and routers, 477–479
circuit and packet switching, 481
circuit switching, 482–483
packet switching, 483–484
components, 486–487
control section, 488–489