Baca A.G., Ashby C.I.H. Fabrication of GaAs Devices

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Semiconductor properties

utilises a tightly focused (0.5 nm) electron beam which is rastered

across the sample. The STEM image is constructed from the pos-

itional information of the scanned electron beam. The dwell time

at each position in STEM must be sufﬁcient to gather enough

signal-to-noise, making the technique slower than conventional

TEM. To make image collection times reasonable, dwell times are

limited and STEM images are usually of lower resolution than

TEM. However, the power of the technique is realised by the

extra capability that becomes available for position-speciﬁc ana-

lysis within the sample. Electron energy-loss spectroscopy is one

such technique that can be used with STEM at speciﬁc positions

identiﬁed in an image to identify chemical species by their char-

acteristic energy absorption from the electron beam. For example,

one can determine whether certain impurities segregate near

defects.

TEM images are obtained by specialised sample preparation

techniques. Samples are mounted on an appropriate ﬁxture and

thinned by a combination of lapping, polishing, and ion milling

down to a thickness of tens of nanometres. Traditionally, these

techniques have been very time consuming and have required

a great level of skill. In addition, speciﬁc areas of devices are

extremely difﬁcult to precisely locate and image. This situation

has improved greatly with the recent combination of TEM with

focused ion beam (FIB) techniques.

An FIB is an instrument similar in construction to an SEM,

but which accelerates ions to the sample rather than electrons.

The FIB can be used to ion mill a hole in a sample so that an

SEM image can be taken of the cross-section. Alternatively, the

FIB can be used to drill down the opposite sides as well, so

that the piece can be removed from the FIB with a thickness

appropriate for TEM for imaging. The use of FIB with TEM

has greatly increased the ﬂexibility of the technique and reduced

the complexity of sample preparation. Free standing ﬁlms can

be cut in 30 min with greater precision and reliability compared

to many hours for the traditional methods of lapping and ion

milling. The main drawback to using FIB is the possibility that

the energetic ion beam perturbs the sample. The surface of the

sectioned ﬁlm may become amorphous. Nevertheless, the power

to image precise areas of a device (such as across the active

area) has led to great advances in device optimisation and failure

analysis.

conduction band

vacuum level

primary

electron

Auger electron (KLL)

valence band

FIGURE 2.12 Auger electron

transition process for Si. In Auger

terminology, the K shell represents

1s electrons, the L shell represents

2s and 2p electrons, etc.

Another electron beam technique in widespread use is Auger

analysis. In the Auger effect, an incident electron is sufﬁciently

energetic to eject a core electron from an atom in the sample

(FIGURE 2.12). The core electron vacancy (1s or K shell in

FIGURE 2.12) may be ﬁlled by a higher energy core or valence

Semiconductor properties

electron (2p or L shell in FIGURE 2.12). The energy released

by ﬁlling the ionised core state with another electron in the atom

results in emission of an X-ray of the proper energy or the ejec-

tion of another electron. The latter process is called the Auger

process and the energy of the ejected electron is characteristic

mainly of the atom involved but also includes small shifts in

this energy due to the chemical environment. X-ray emission

(as in EMP) and Auger emission are competing processes for

ﬁlling atomic core vacancies. Generally, the Auger process is

favoured for low atomic number elements and X-ray emission

dominates for high atomic number. The Auger electron will typ-

ically have energy of hundreds of eV and a mean free path in

the semiconductor of tens of angstroms, making Auger spec-

troscopy a surface-sensitive technique. Auger spectroscopy ﬁnds

its greatest utility in analysing semiconductor surfaces after pro-

cessing or cleaning steps. It is particularly sensitive to carbon

and oxygen contamination and can detect sub-monolayers of a

surface ﬁlm.

Auger spectroscopy is most often performed in stand-alone

high-vacuum (or ultra-high) chambers but also as an in-situ

module for MBE growth chambers or cluster tools. Its instru-

mentation consists of an electron gun, electron-beam control, an

electron-energy analyser and data-analysis electronics. The incid-

ent electron energy is typically 1–5 keV. Auger instruments can

be set up for two-dimensional scanned analysis, if desired, or

in combination with sputter depth proﬁling. The latter method,

which uses an ion beam to sputter away the material to expose

buried regions, is often used for proﬁling ohmic-contact reactions

(Section 6.2.3). Auger analysis will be contrasted with ion-based

analytical techniques in the next section.

Several other electron-beam analysis techniques ﬁnd important

uses but will not be described in detail here. These techniques

include electron-beam-induced current (EBIC) and electrolumin-

escence. These techniques can be used in conjunction with

an SEM.

2.5.3 Ionic techniques

Ion-beam techniques of analysis and characterisation are high-

vacuum electrostatic techniques like their electron beam counter-

parts. Incident ions are absorbed, emitted, scattered, or reﬂected

from a sample and are analysed for ion scattering, energy and mass,

among other properties. Incident ions can also initiate photon or

electron emission and these can also be analysed.

Secondary-ion mass spectrometry (SIMS) is perhaps the most

widely used ion-beam technique. SIMS instruments are usually

Semiconductor properties

stand-alone high-vacuum chambers speciﬁcally designed for ele-

mental analysis. In SIMS, an ion beam is focused at a sample

with sufﬁcient energy to sputter it away (tens of keV ion energies

for ion penetration of several monolayers). The energy and mass

transfer of the ion is sufﬁcient to break surface bonds and dis-

place atoms in the sample and to implant the incident ion. These

atoms or fragments may react, rearrange themselves, or desorb as

ions or neutrals. It is the desorbed ions (not neutrals) that can be

accelerated and focused towards a mass spectrometer and detected

by it. Although only a small fraction of ejected particles are ion-

ised, these are efﬁciently detected with high discrimination against

other possible elements by the mass spectrometer. The sample is

analysed as it is sputtered and elemental analysis as a function of

depth is provided with reasonably high depth resolution. Typic-

ally, a list of elements is requested for analysis. Some of these

may be dopants and the rest are usually impurities of concern.

Impurities may be detected at the parts per billion level, or lower

in favourable cases. Detection limits in SIMS range between 10

and 10

−3

for many trace elements.

The ion beam is chosen based on its electronegativity and abil-

ity to ionise certain elements. In SIMS, it is the total desorbed ion

yield of elements of interest that enhances the sensitivity of detec-

tion. Primary (sputtering) ions such as O

,Cs

−

, and Ar

are chosen based on their ability to ionise a particular element

or group of elements for analysis. For example, electronegative

oxygen (O

) enhances the ionisation of electropositive elements

such as Mg, Ga and other group III elements. Electropositive Cs

enhances the ionisation of electronegative elements such as O,

As, and other group V elements. Whereas the electronegative

property of oxygen itself explains the ionisation of electropos-

itive elements, the electropositive effect of Cs

ions is explained

by work functions that are reduced by the implantation of Cs in

the near surface region of a sample.

The secondary-ion yield variesgreatly depending on the primary

ion chosen and the chemical nature of the sample. Two import-

ant practical effects arise from this situation. First, calibration

using known standards is a necessary part of SIMS analysis.

Selection of a standard that does not sputter at the same rate

as the sample will lead to errors in the supposed depth being

sampled and give erroneous composition-versus-depth informa-

tion. Second, the ion yields at surfaces are highly unpredictable.

For example, an oxidised surface may enhance the ion yields

by factors of 1000. Typically, the ﬁrst few monolayers of ana-

lysis must be ignored in most cases. Calibration samples can be

prepared by ion implantation, since the total implanted dose has

an uncertainty of less than 5% in most cases.

Semiconductor properties

SIMS instrumentation is extremely complex. For the purpose

of this section, a few general descriptions will sufﬁce. Ultra-high

vacuum is necessary to avoid contamination. Within the vacuum

chamber, incident ions are accelerated and focused at the sample

with electrostatic ion optics. The secondary ions require high mass

resolution to distinguish chemically different but similar mass ions

such as

P and

SiH. The mass spectrometer will consist of

electrostatic and magnetic sector analysers in tandem.

Impurity and dopant proﬁling are the most important applic-

ations for SIMS in semiconductor manufacturing. For GaAs

devices, the characterisation of heterostructure or other semicon-

ductor interfaces is important as well. For example, the growth

initiation procedures of epitaxial growth on bulk substrates by

MBE and MOCVD are studied by SIMS to ascertain the effect-

iveness of cleaning procedures. SIMS is widely used to identify

impurity incorporation during the growth and processing of GaAs

devices.

Rutherford backscattering spectroscopy (RBS) is another

important ion-beam analysis technique. In this technique, the

energy of backscattered ions is measured and related to the sample

under study. In this case the incident ion energies (typically

for He) usually exceed 1 MeV. Incident ions are backscattered

through collisions with the nuclei of atoms in the sample. In RBS,

the following equation holds due to conservation of energy and

momentum:

= 1 − 2R(1 − cos θ)/(1 + R

) (2.18)

where R = m

, the mass ratio of the ion and the sample’s scat-

tering atom, E

is the backscattered ion energy, E

is the incident

ion energy and θ is the scattering angle. EQN (2.18) is derived

assuming that R1 (for He ions this is usually a good assump-

tion) and θ is close to 180 degrees (near total backscattering). From

this relation, the mass of the scattering atom can be determined by

measuring the energy of the backscattered He ion.

In addition to the mass identiﬁcation in a sample (and corres-

pondingly, element identiﬁcation), concentration and thickness

can be determined as well. The relation between energy loss of

ions in solids is well established and can be used for thickness

determination of a layer in a sample. EQN (2.18) determines the

energy cutoff condition for RBS. Below the surface of the sample,

the incident ion loses energy as a function of depth to the solid and

EQN (2.18) would be modiﬁed for

∗

= E

− ΔE (2.19)

Semiconductor properties

where E

∗

is the incident energy modiﬁed by the energy loss in the

solid up to the depth d. Energy losses are slightly energy dependent

and are listed in tables of stopping power. The concentration is

determined by the intensity of the backscattered signal, generally

without need for calibration. The thickness resolution of a thin

ﬁlm can be as good as 1 nm.

An RBS system consists of a high-vacuum chamber that con-

tains a He-ion generator, an accelerator capable of achieving

1 MeV ion energies, the sample holder and the detector. Most of the

ions pass through the sample and perhaps one out of 10

is back-

scattered. The backscattered ions are detected by a semiconductor

detector that operates much like the X-ray detector described for

EDS. The ions pass through the semiconductor detector, creating

many electron-hole pairs that are detected as current pulses that

are ampliﬁed and analysed for pulse height, which is proportional

to the ion energy.

RBS is useful in semiconductor manufacturing as a means of

quantifying composition of thin ﬁlms. Due to the cost and com-

plexity of the technique, it has not achieved routine use, but rather

is employed as a method of calibrating other analytical techniques

for determining composition of thin ﬁlms or as a research tool.

Another ion-beam technique is not strictly used for analysis but

rather for sample preparation in conjunction with other analysis

techniques. Focused ion beams (FIB) can operate within an SEM

or similar instrument to ion-mill in speciﬁc areas of devices that

are imaged by the SEM and create a cross-section of the area. The

cross-section can be imaged directly within the FIB instrument

or SEM or TEM. The cross-section can also be cut out of the

sample and transferred to another TEM. FIB-assisted techniques

have become extremely useful in failure analysis of GaAs devices

and in relating ohmic-alloy reactions (Section 6.2.3) to electrical

properties, to mention two examples.

2.5.4 Electrical characterisation

Electrical characterisation techniques can either be somewhat spe-

cialised (and usually designed for materials scientists) or can be

based on measurements of two and three terminal devices such as

diodes and transistors.

Resistivity measurements are an important part of characterising

thin semiconductor ﬁlms, whether produced by ion implantation or

epitaxy. Resistivity measurements are also made for thin conduct-

ing ﬁlms. Some techniques used are the four-point-probe method

and contactless methods. The techniques described here measure

resistance. If a sample has uniform resistivityin a known thickness,

the resistivity can be calculated from the measured resistance.

Semiconductor properties

In a two-probe resistance measurement technique, current is

measured as a function of voltage and the resistance is calculated

according to Ohm’s law. The resistance will include a contribution

from the probes and the probe contact resistance. A four-point-

probe method (FIGURE 2.13) is a means of eliminating the

extraneous sources of resistance by using two extra probes to

measure the voltage across a section of the current path and calcu-

lating its resistance across a known distance using a known current,

forced by the ﬁrst two probes. The term “four point probe” is used

to describe an instrument that carries out such measurements in a

calibrated way. Such an instrument typically uses a spring loaded

mechanism that pushes small diameter metal probes against the

sample and is calibrated for the spacings in the probe (usually

changeable for different resistivity ranges and materials). Four

point probes are widely used for quick measurements of thin metal

ﬁlms but also on occasion for GaAs wafers if an appropriate probe

is attached (with ﬁner tips for better contact). The four point probes

can also be used to map wafers; this is widely done in Si manufac-

turing. However, because of the possibility of chipping the wafer

with the probe, contactless resistivity measurements are preferred

for GaAs.

FIGURE 2.13 Illustration of the

four-point-probe method. The two

outer probes are used to force a

current, I. The resistance is

calculated from I and the voltage

measured across the two inner

probes.

Contactless resistivity usually refers to a measurement method

based on eddy currents. A sample is placed between two sets of

coils. Each coil is embedded within a ferrite material. A current

in the upper coil will induce a current in the lower coil. When

a conductive sample is placed between the coils, the Q (quality

factor) of the circuit is changed and with it, the induced current

in the lower coil. By using samples of known conductivity, the

instrument can be calibrated to measure arbitrary samples. The

measurement is quick and can be instrumented to step across a

wafer and generate wafer maps of resistance. Such instruments are

popular for mapping the resistivity of epitaxial or ion implanted

layers created on semi-insulating substrates.

Carrier mobility measurements are important to growth and pro-

cess engineers as a measure of the quality of the semiconductor.

Mobility can be of two types, drift (mediated by an electric ﬁeld)

or Hall (mediated by a magnetic ﬁeld). Although the former more

directly relates to operation in GaAs devices, the two are often not

very different and Hall mobility measurements are more quickly

carried out. In addition, both methods can assess material quality.

Mobility is reduced by physical factors, including temperature.

More importantly, from a material quality perspective, impurities

reduce mobility. For a more complete description of the differences

between the two techniques, see [1].

Capacitance-voltage (C-V) proﬁling can provide a wealth of

information. It is most well known for assessing the quality of the

Semiconductor properties

oxide in MOS devices, but it is also widely used for determin-

ing dopant proﬁles in semiconductors. The latter technique relies

on the fact that the width of a depletion, or space charge region,

of a semiconductor junction can be modulated by an applied

voltage. For GaAs devices, Schottky junctions and pn junctions

can be probed. The former are important for ﬁeld effect transistors

(Chapter 8) and for dopant proﬁling, while the latter are important

for heterojunction bipolar transistors (Chapter 9), laser diodes and

LEDs. We consider a Schottky-barrier diode with doping of N

A DC bias is applied to the Schottky contact. The differential or

small signal capacitance is given by

C = dQ/dV = εA/w (2.20)

where dQ is the incremental charge induced by a small change

in the voltage dV, ε is the dielectric constant of the semicon-

ductor, A is the area of the Schottky contact and w is the width

of the depletion region. The equation (derived using the deple-

tion approximation – mobile carriers are assumed to be zero in the

depleted space-charge region) relating C to the doping is given by

d (1/C

)/dV = 2/qεA

(2.21)

By measuring C as a function of applied voltage and plotting (1/C

)

as a function of V, it is seen that the doping concentration N

is obtained from the slope of the (1/C

) versus V plot as long

as the area of the Schottky contact is known (Section 7.2.1 and

FIGURE 7.2).

Capacitance-voltage measurements can be made with whatever

Schottky contacts are available, often deposited metal contacts.

However, the quickest measurement uses a temporary Schottky

contact with a mercury-probe instrument. In this technique, a small

capillary is immersed in a mercury reservoir at one end and is

placed within a millimetre-sized enclosure at the other end. When

a semiconductor is placed over the enclosure, a vacuum seal results

once the volume is pumped down. The vacuum causes the mercury

to rise until it reaches the top of the capillary. At that point, it would

spill over the capillary and get pumped out, were it not for the small

dimensions involved and the surface tension of the mercury. The

mercury acts as a temporary Schottky contact that will be used to

measure the capacitance as a function of voltage, whereupon the

vacuum is released and the mercury is returned to its reservoir.

The second electrode for the measurement may be a second, larger

mercury dot, or a plate pushed into contact against the backside

of the semiconductor. The surface tension of the mercury keeps

the probe operating properly as long as the mercury is kept clean.

Semiconductor properties

Dirty mercury will lower the surface tension and cause the loss of

mercury to the vacuum line. Mercury probes are inexpensive and

useful tools.

Current-voltage (I-V) techniques are available for measuring

the electrical properties of diodes and transistors. The details and

interpretation for these measurements will be left to the chapters

relating to the particular devices of interest (Chapters 6–10).

However, the hardware and procedures for the apparatus will be

described here. One generally uses a probe station, which is moun-

ted on a vibration-isolation table and is connected to vacuum lines

for wafer and probe clamping. The probe station, or prober, typic-

ally contains a mounted microscope for viewing the probes with

the device of interest. The sample is placed on a moveable (often

motorised) stage and clamped with vacuum suction. Probe posi-

tioners are likewise clamped with vacuum suction or magnetic

bases. Probe tips are mounted on the positioners and are moveable

within an area covering several millimetres and can be lowered to

contact metallised probe pads connected to the device of interest.

If more than a few probes are needed, special probe cards can

be built to probe multiple pads on the sample. Special coaxial

probes are available for high-frequency measurements. The posi-

tioners are connected in a convenient way to the test equipment.

The probers often have heated stages that can be enclosed in light-

tight and electrically-shielded enclosures. Software is available to

interface with test instruments, collect data, auto-step to multiple

die on a wafer and map the results. A multitude of test instruments

can interface to the probers, including semiconductor parameter

analysers and other instruments that offer voltage sources, current

sources, voltageprobesand current probes as well as oscilloscopes,

pulse generators and LCR (inductance, capacitance, resistance)

meters.

Several considerations are crucial for getting consistent results

with electrical testing. The contact resistance of the probes must be

minimised by repeatable methods of placing them down. Proper

levelling of the stage and the use of overdrive sensors, and proper

probe pressure are necessary for automatic probing. Also, GaAs

and other high-gain devices are prone to oscillation and the exten-

ded wiring often found in probe stations can often make the ideal

external circuit to support low-frequency oscillations. If these are

a problem, precautions such as the use of shielded cable or use

of bypass circuitry (such as ferrite beads to create an LCR cir-

cuit) at each probe to bypass low-frequency oscillations may be

necessary.

Another electrical technique of interest will be brieﬂymentioned

for familiarity with its existence only. Deep-level transient spectro-

scopy (DLTS) is a method of probing the traps in a semiconductor

Semiconductor properties

material. Transient measurements, I-V or C-V, are made as a

function of temperature and information relating to traps can often

be deduced.

2.6 PROCESSING TECHNIQUES

Semiconductor processing techniques consist of three basic steps

plus several specialised procedures. The basic steps are sample

patterning, thin-ﬁlm deposition and etching (a material removal

technique). Specialised techniques include cleaning procedures,

dopant introduction methods such as ion implantation and semi-

conductor regrowth. Excellent texts have been available for many

years offering comprehensive coverage of processing techniques

as well as equipment and materials used to implement them [13–

17]. It is not our intent to reproduce that material in this book;

rather we discuss processing techniques in terms of how they affect

GaAs device performance and reliability, with special attention

to the surfaces and interfaces in these devices. We present crit-

ical processing details for a wide variety of situations where the

process can affect device performance and reliability but leave

comprehensive coverage of most process techniques to other texts.

Processing techniques referred to in this book are introduced

closest to the subject matter where they are ﬁrst required. For

example, photolithography is presented in Chapter 4 and rapid

thermal annealing is introduced in Chapter 6 and both are referred

to in later chapters as well. The reason for this type of presenta-

tion is that processing subtleties and interactions occur for most

combinations of two or more process steps and examples of these

interactions are best given in the appropriate chapter where the

complexity becomes apparent.

The remaining processing techniques presented in this chapter

are those of back end processing, which are introduced in the next

section.

2.7 BACK END PROCESSING AND ANALYSIS

No presentation of active device processing is complete without

context for how these steps ﬁt in within the overall product real-

isation process. The steps for die separation, packaging, reliability

and failure analysis are generic steps that are necessary for the man-

ufacture of many semiconductor devices, not just GaAs devices.

With the exception of reliability, the execution of these steps is

more similar than different compared to Si devices. Those aspects

Semiconductor properties

of reliability testing that have unique bearing on processing GaAs

devices will be elaborated on in succeeding chapters where such a

discussion is useful and relevant. In this section, a general present-

ation of the basics of die separation, packaging, reliability and

failure analysis is brieﬂy introduced.

2.7.1 Backside processing, die separation and packaging

Once frontside processing is completed, a complete electrical test

of all die is usually performed to identify devices that meet elec-

trical speciﬁcations. During this process, devices that fail one or

more speciﬁcations are sometimes “inked” to visually identify

them as bad devices. Even though they are tracked through a data-

base from the output of the electrical test, the ink is often used

because it makes any mishandling less likely.

The wafer can now be mounted to another substrate for back-

side operations if the application calls for wafer thinning (as most

do). A thinned GaAs wafer is extremely difﬁcult to handle, will

deform so it does not remain ﬂat, and therefore requires the use

of a host substrate. This supporting substrate is typically glass,

quartz or sapphire, whose transparency allows the use of infrared

aligners for backside alignment. An adhesive such as wax is

used to bond the GaAs to the host substrate. These adhesives are

available in spinnable versions for uniform application to the sub-

strate. The frontside of the GaAs may be coated with resist to

protect it before applying adhesive. The mounting process itself

requires bonding of the frontside of the GaAs to the substrate,

usually with the application of pressure within an appropriate

ﬁxture.

After bonding of the wafer to the host substrate comes wafer

thinning. The wafer/substrate is mounted on a ﬁxture that ﬁts in a

lapping machine. The ﬁxture places the GaAs wafer upside down

on a large rotating plate coated with a mixture of water, lubricant

and grit. The grit is a speciﬁc size of particles of a hard material

such as alumina, silicon carbide or diamond. Plates are made of

a material that is harder than GaAs, so they do not wear away

readily, but they do eventually wear and deviate from ﬂatness.

They then will need resurfacing or replacing. During lapping, one

generally starts with a large-sized grit (15–30 μm) for fast lapping

and works down to a ﬁne grit (1 μm or less) as the lapping nears

completion. With care, the lapping process can leave the GaAs

wafer with excellent ﬂatness.

The ﬁnal thickness of the wafer depends on the application.

Low-frequency and low-power applications for discrete transist-

ors may not require any wafer thinning for electrical or thermal

reasons. However, these wafers are often lapped to some extent