Cleaning and passivation of GaAs and related alloys
states, and the energy of the surface is raised relative to the bulk
by the surface potential, φ
s
. An exact determination of φ
s
requires
the solution of Poisson’s equation with appropriate boundary con-
ditions. For simplicity, one may assume that the space charge ρ is
equal to eN
d
d from the surface to a depth, d, where d = N
s
/N
d
.
The surface potential, φ
s
, is then given by eN
2
s
/2N
d
, where is
the semiconductor permittivity. The energy by which the bands
are raised at the surface is approximately ΔE = eφ
s
. If the surface
potential is sufficiently high that the valence band at the surface
becomes closer to the Fermi level than the conduction band is,
the near-surface region becomes effectively p-type and an inver-
sion layer is formed. The response of these various quantities to
externally applied voltages is discussed in Section 7.2.1.
When there is an extremely high density of midgap surface
states, as in the case of GaAs(100), the Fermi level is effectively
pinned at the energy corresponding to that of the midgap states.
Changing applied voltages may merely move carriers into and out
of surface states, leaving the position of the Fermi level unchanged
and “pinned” at the surface-state energy. The primary goal of sur-
face passivation is the unpinning of the Fermi level. Changing the
chemical composition of the surface layer will change the energy
of the dominant surface states. If the new surface states are moved
close to the VBM or CBM or, even better, are moved out of the
forbidden gap, the Fermi level can become unpinned. However,
changing the surface composition may serve merely to pin the
Fermi level at another position within the gap if there is still a high
density of midgap states at the new energy position.
Fermi level pinning can occur at a wide range of inter-
faces. It is seen at “clean” semiconductor surfaces grown by
MBE, naturally oxidised surfaces, chemically modified sur-
faces, semiconductor/insulator interfaces, metal/semiconductor
interfaces and regrown semiconductor/semiconductor interfaces.
While the remainder of this chapter will be focusing on chem-
ical modification of exposed surfaces, most work on Fermi
level pinning has been directed towards the understanding of the
metal/semiconductor interface because of its importance in device
performance.
A number of models have been put forth to explain the ori-
gin of Fermi level pinning and its effect on the Schottky barrier
height [7] of Schottky contacts (Chapter 7). These include the
unified defect (UDF) or advanced unified defect (AUD) models
of Spicer et al., the metal-induced-gap state (MIGS) model of
Heine and later Tersoff, the disorder-induced gap state (DIGS)
model of Hasegawa and Ohno, and the effective work function
(EWF) model of Woodall and Freeouf. The proposed origin of
the pinning states varies with the model employed. In the UDF
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