Baca A.G., Ashby C.I.H. Fabrication of GaAs Devices

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Cleaning and passivation of GaAs and related alloys

etch rates at 60

◦

C almost an order of magnitude higher than at

◦

C. Since passivation occurs readily at room temperature, use

of elevated temperatures and the associated etching can be avoided.

This is a commonly used technique because it is very easy

to implement, requiring only simple glassware. However, it is

very important to perform these reactions in a good fume hood.

Like many sulphur compounds, these really smell horrible. It is

important to avoid acidifying these solutions since they will then

release hydrogen sulphide, H

S, which is more poisonous than

hydrogen cyanide, HCN. Fortunately, H

S smells so bad that its

presence is self-notifying at levels well below the dangerous level.

However, it is also a molecule where olfactory fatigue rapidly

sets in and a gradual increase in concentration to hazardous levels

might not be noticed.

XPS studies of GaAs surfaces following sulphidation with

ammonium sulphide solutions show two types of S: one character-

istic of sulphide, S

2−

, and the other characteristic of disulphide,

2−

. Both Ga-S and As-S bonding are observed. The surface

species formed will depend on the state of the GaAs surface

before introduction to the (NH

)

S solution. If the surface was

previously deoxided with NH

OH, which effectively dissolves ele-

mental As, only Ga-S is seen, while deoxiding with HCl or H

which leave elemental As, produces both Ga-S and As-S surface

bonds [1].

Organic thiols (alcohols where the O has been replaced by S)

have also been used as passivants. However, the organic portion

of the thiol can be a source of carbon in subsequent processing.

This may not be a problem, but the fabrication engineer should be

aware of the possibility.

The surface can also be sulphided using an applied electric

potential and a sulphide solution. While the electrochemical pro-

cess is effective in applying a sulphide that appears somewhat more

stable than the conventional wet dip, it requires electrical contacts

to the wafer and is not likely to be generally applicable.

A thin yellowish ﬁlm of excess sulphur may be observed after

passivation of the GaAs surface with (NH

)

. This will sublime

away in vacuum, leaving only the S directly bonded to the GaAs

surface. If the sample is not going to be placed under vacuum, it

is customary to rinse the surface of the wafer thoroughly with DI

water after removal from the sulphide solution to remove excess

sulphides that can precipitate on the surface and cause problems if

not rinsed away. Optimised rinsing protocols have not been repor-

ted, but use of consistent rinsing times and conditions is probably

important for reproducibility.

For a GaAs sample passivated with (NH

)

and then handled

without exclusion of air, surface analysis by Auger electron

Cleaning and passivation of GaAs and related alloys

spectroscopy (AES) showed both oxygen and sulphur on the

surface [12]. The oxygen found on the partially sulphided

surface responded to temperature differently than the oxygen

observed when only the native oxide is present. For a GaAs

surface with native oxide only (no S), oxygen comes off in

TPD (temperature-programmed desorption) over two temperature

ranges: 400–500

◦

C and 570–640

◦

C, indicating at least two differ-

ent binding sites for O. As-O is lost from 400–500

◦

C and Ga-O

is lost from 570–640

◦

C. For the partially sulphided surface, the

oxygen decreased above 400

◦

C and disappeared by 500

◦

C. The

sulphur was unchanged to 530

◦

C, and totally gone by 600

◦

3.3.2.2 Gas-phase processes

Unlike(NH

)

S passivation, which also etches offthenativeoxide,

it is necessary to remove the native oxide before the gas-phase

passivations are applied. Without prior oxide removal, the greater

strength of the Ga-O and As-O bonds inhibits the formation of

Ga-S and As-S at the GaAs surface.

When the GaAs surface has been effectivelydeoxided, the initial

increases in PL intensity are greater with gas-phase S than those

produced with the (NH

)

treatments. When oxygen is mostly

excluded, the increase in PL over the native oxide value can be

about twice as great as that achieved with (NH

)

treatment.

The gas-phase processes all generate S atoms or Se atoms. This

can be done thermally, photochemically or using a plasma. These

have an advantage over the wet techniques of being very clean

processes that do not leave any undesirable solid residue to remove

before further device processing is possible.

Passivation using thermal generation of S and Se has been

accomplished under UHV conditions. Under such conditions,

the necessary deoxidation of the surface can be accomplished

thermally, although an initial wet etch to reduce the native oxide is

helpful. Chalcogen source gases are volatile disulphides or disel-

enides such as SnS

and SnSe

that decompose upon heating to

release atomic S at 550

◦

C and 340

◦

C, respectively.

A simpler and less expensive approach employs UV photo-

dissociation of the S

rings that evaporate from the surface of

heated sulphur [13]. Reaction of the S atoms with GaAs occurs

at room temperature under high vacuum (10

−5

torr). This pro-

cess can be used with prefabricated devices that have already been

metallised since standard contact metallisations are not attacked

by the NH

OH solutions that can be used to expose the oxide-free

surface. The surface can be kept mostly oxide-free by stripping

the oxide under an inert atmosphere in a glove box attached to the

reaction chamber. XPS studies of photosulphided GaAs show Ga-S

Cleaning and passivation of GaAs and related alloys

and As-S bonding with the sulphur being intermediate between a

sulphide and a disulphide in oxidation state and negativelycharged,

as expected.

The third approach generates S atoms by plasma-dissociation of

S. Like other plasma processes with H-containing source gases,

this approach can inject H into the bulk of the GaAs, passivating

dopants and defects. Reactivation of H-passivateddopants requires

annealing at about 400

◦

C (Section 5.7), which can result in S loss

from the surface. While this is a disadvantage, the atomic H can

react with the surface oxide and remove it, thereby exposing the

GaAs surface to sulphur. Hydrogen-plasma removal of the native

oxide is reported to produce a Ga-terminated surface depleted in

As, which may be advantageous since excess As is known to cause

electronic problems.

3.3.2.3 Problems with retention of passivation

The long-term retention of simple sulphur treatments in

exposed regions of a device, as opposed to being conﬁned at

metal/semiconductor interfaces, presents problems. Regardless of

whether the S was initially applied in solution or from the gas

phase, it will be lost from the surface relatively rapidly if left in

air. Our PL studies have shown virtually complete loss of S within

24 h for an unprotected surface in room light in air. The rate of

loss is accelerated by light in general and especially by UV light.

The light intensity employed for PL measurements is sufﬁcient

to remove enough sulphur to regain the native-oxide PL intens-

ity after about 10 min. Photodeposited sulphur appears somewhat

more stable than that deposited from an (NH

)

S solution, but

there is less than a factor of ﬁve difference. Storage in the dark

slows the loss of photodeposited sulphur, but the PL intensity was

still reduced by 25% after three days in the dark and had returned

to the native-oxide level after three months.

Encapsulation might seem to be the solution to the rapid sulphur

loss. However, there is some loss of S if one tries to encapsulate the

sulphided surface with a plasma-deposited dielectric. The origin

of this problem is the use of silane, SiH

or disilane, Si

,as

the Si source gas for SiO

or SiN

ﬁlms. Both reactants provide

an ample source of H atoms to react with the surface S and form

volatile products, such as H

S. An additional possible cause of

S loss is the UV-induced dissociation of S from the surface even

without reaction with H, since most plasmas emit in the UV.

Both conventional PECVD “silicon nitride” (SiN

) and ECR-

deposited “silicon nitride” or silicon oxynitride (SiO

) prevent

long-term total loss of the passivation that survives the dielectric

deposition process. For 7 × 10

/cm

n-GaAs, for which either

Cleaning and passivation of GaAs and related alloys

photosulphidation or an (NH

)

treatment produced a ten-fold

increase in PL intensity, about a 2.5-fold increase was retained

following dielectric deposition by either technique. No change

in the encapsulated-surface PL was detected after six months,

suggesting a chemically and electronically stable surface.

A sulphided surface that has been encapsulated by plasma

deposition of silicon nitride or silicon oxynitride can change the

near-surface doping level. Since S is a donor impurity in GaAs, it

is able to increase the free-carrier concentration of the substrate.

A 10% increase in electron concentrations has been observed for

heavily doped GaAs using Raman spectroscopy (Section 3.3.1.3).

The low-energy ion bombardment occurring during the deposition

appears to be responsible. XPS studies were performed on photo-

sulphided surfaces that were uncapped or capped with ECR SiN

deposited either with line-of-sight into the plasma or shadowed

from direct line-of-sight. About half of the surface S was lost with

shadowed deposition while about one third was lost with line-

of-sight. More signiﬁcantly, while 8% of the S was transformed

into the donor type with shadowed deposition, 19% underwent the

transformation with line-of-sight deposition.

One promising approach to retaining an S-based passiva-

tion through the dielectric deposition process involves stabilisation

of the surface-bound S by reaction with a metal ion in solution

before the freshly sulphided surface is exposed to air [14]. The

results displayed here were obtained with a surface that was sulph-

ided using UV photolysis of S

, but it should also work for surfaces

sulphided using other techniques. Being careful not to expose the

freshly sulphided surface to oxygen, the S-passivated sample is

immersed for 30 s in a dilute (<1M) deoxygenated aqueous solu-

tion of a metal salt. The surface is then rinsed with DI water

and blown dry with nitrogen. While a range of metal ions (Ga,

Zn, Ni, Fe, Mn, Ca, La) produced initial PL improvements up to

twice that obtained with S alone, the PL improvement gradually

decreased over a period of a few days. Only Zn

produced an

improvement in PL intensity that remained equal to the fresh S-

only value after exposure to air for more than 700 days. Upon

initial exposure to air, a 10% improvement in PL intensity is

obtained and XPS studies show a (Zn, S, O) composition on the

GaAs surface. With immediate encapsulation of the fresh Zn+S

surface using a room-temperature ECR SiO

described more

completely in Section 3.3.3.6, no signiﬁcant change in PL intensity

is caused by the plasma deposition and the initial high PL intens-

ities (FIGURE 3.6) were retained indeﬁnitely (>330 days). The

slight apparent improvement in PL with the dielectric only may

be largely due to its AR-coating effect, although device results in

FIGURE 3.7 suggest some electronic effect as well.

Cleaning and passivation of GaAs and related alloys

normalised PL intensity

0246810 12 14 16 18

native oxide

photo S

(NH

)

dip

SiO

photo S +ZnF

hoto S +ZnSO

+ SiO

hoto S +ZnSO

+ SiO

after 331 days

photo S +ZnF

+ SiO

FIGURE 3.6 Normalised PL spectra from 6.9 × 10

/cm

n-GaAs after

different S treatments with and without dielectric deposition.

Improved device operation with an encapsulated Zn-S-GaAs

surface has been obtained. Improvement in the current gain

(β = I

) for passivated 100 × 100 μm AlGaAs/GaAs HBTs

is consistent with the improvement in PL intensity (FIGURE 3.7).

The (Zn-S-O) surface that results from metal ion treatment of

sulphided GaAs may be somewhat analogous to the growth of

ultrathin epitaxial layers of II–VI semiconductors on the GaAs

surface. When grown on an As-deﬁcient surface, 84 nm of epi-

taxial ZnSe produced interface state densities in the low 10

/cm

which is comparable to the AlGaAs/GaAs interface. The use of

standard epitaxial regrowth by MBE is not readily applicable to

many partially fabricated devices, but perhaps the low interface-

state density obtained with the thicker layers may be achieved

by variations of the metal-ion-sulphide process. Simple multistep

treatments, such as sulphidation followed by metal-ion reactions

followed by dielectric encapsulation, appear to be a research area

worthy of further investigation.

When the encapsulant does not have to survive elevated tem-

peratures, an organic material may be used. Polyimide has been

used successfully to cap an InGaAs/InP PIN photodetector, which

displayed almost no increase in dark current a month after capping

(FIGURE 3.8) [15].

Since passivation effectiveness depends intimately on the ener-

getics of the chemical bonding at the surface, it should not be

surprising that something that works very well for one material

might not work as well for another. For example, while sul-

phur and sulphur + metal treatments improve current gain, β,

for AlGaAs/GaAs HBTs, the same treatments actually appear to

Cleaning and passivation of GaAs and related alloys

unpassivated

ZnSO

+ S + SiO

130

1 10010 1000

(A/cm

)

(a)

130

1 10010 1000

(A/cm

)

(b)

unpassivated

ECR SiN

FIGURE 3.7 HBT current gain following dielectric deposition with and

without metal-S passivation.

(NH

)

S +polyimide

after 1 month

(NH

)

S only

after 1 month

–5 –4 –3 –2 –10 1

–10

–9

–8

–7

–6

–5

–4

dark current (A)

volta

e (V)

FIGURE 3.8 Retention of low dark current with polyimide encapsulation.

(From Ravi et al. [15].)

introduce new gap states and lower the β for InGaAs/InP HBTs.

Similarly, a passivation that works well on the (100) surface may

not be as effective on an exposed (110) or (111) surface, or it might

be even more effective, depending on where the chemical bonding

at the surface moves the dominant surface states.

Cleaning and passivation of GaAs and related alloys

3.3.2.4 Effects on surface electronic properties

Passivation treatments are often discussed in terms of their effect

on the position of the Fermi level and whether it is pinned at the sur-

face. Movement of the Fermi level from the native-oxide position

may not mean that the level is unpinned. It may merely mean that

the treatment has replaced the old dominant set of midgap states

with a new set at a differentenergy levelbutstillwithin the gap. The

Fermi level will pin at this new position. For example, for GaAs

samples that have been cleaned using a hydrogen plasma or by

thermal desorption of an As capping layer, the Fermi level is pinned

at about 0.65 and 0.6 eV above the VBM. Treating the surface with

S or Se shifts the Fermi level about 0.4 eV towards the CBM. This

reduces the band bending for n-GaAs, butthe surface is still pinned.

Whenever there is a change in the relative electronegativities of

the atoms in different layers, as in the case of replacing As with the

more electronegative S, a surface charge dipole will form. When

charge is trapped at the interface for whatever reason, a dipole

also forms. To evaluate the effectiveness of a particular passiva-

tion technique, it is important to distinguish between Fermi level

pinning in the true sense and interface-trapped charge and bonding

dipole effects. These effects can also be an issue for metal contacts.

The quality of an insulator/semiconductor interface can be

characterised by measuring the capacitance versus applied

voltage with a metal-insulator-semiconductor (MIS) or metal-

oxide-semiconductor (MOS) diode structure. When generating a

capacitance-voltage (C-V) curve to characterise the quality of an

interface, it is always important to sweep the voltage several times

in both directions in addition to performing the sweep over a range

of frequencies. Without examining the response in both directions,

an interface may appear much better than it actually is. Although

this may make for a more impressive publication, it is misleading

and of no help when making real working devices is your goal.

The ideal behaviour of an MIS diode is well described in most

device textbooks [8,16]. The total capacitance is a combination of

the semiconductor depletion region capacitance and the insulator

capacitance in series. Forn-typematerial, when the applied voltage

is positive, there is no depletion regionand there is an accumulation

of electrons at the surface. This makes the total capacitance equal

to that of the insulator, C

As the voltage is decreased, a depletion region can begin to

grow. As the voltage decreases further, an ideal interface can

go from depletion into inversion; the gate voltage at which this

occurs is called the threshold voltage, which is negative for an

ideal MIS diode on n-type material. For p-type material, the C-V

behaviouris the mirror image of n-type behaviour. The capacitance

Cleaning and passivation of GaAs and related alloys

quasi-

static

100 Hz

1 kHz

800

700

600

500

400

capacitance (pF)

300

200

100

100 Hz

1 kHz

1 MHz

10 kHz

100 kHz

/n-type (100) GaAs

–8 –6 –4 –20

voltage (V)

=1.6 × 10

–3

area =2.1 × 10

–3

sweep rate = 120 mV/s

2 468

FIGURE 3.9 C-V curves for a MIS diode showing nearly ideal behaviour.

(From Passlack et al. [6].)

in the inversion region depends on the measurement frequency. At

high frequency, the capacitance remains low at voltages where

inversion would occur. However, if the frequency is slow enough

for minority-carrier generation in the depletion region to supply

enough carriers to follow the gate voltage, the capacitance in inver-

sion will be that of the insulator. This is manifest as the capacitance

beginning to dip as the voltage approaches zero and then rising

again to C

of the insulator. These behaviours are displayed in

FIGURE 3.9 for a UHV-deposited Gd-doped Ga

on n-GaAs

[6]. This oxide has displayed remarkably good, although not per-

fect, behaviour for an oxide on GaAs. It will be discussed in greater

detail in Section 3.3.5.

For a non-ideal insulator, the presence of ﬁxed charges can shift

the ﬂat-band position in a C-V curve away from zero, as illus-

trated in FIGURE 3.10 for 36 nm SiN

on either 1 × 10

/cm

n-GaAs or photoS-passivated 5× 10

/cm

n-GaAs. The presence

of S at the interface reduced the total ﬁxed charge in this case.

The ﬁxed charge can be thought of as a built-in voltage at the insu-

lator/semiconductor interface. The higher valueof C

min

for the pas-

sivated interface is consistent with the higher initial doping level.

Another factor to consider, especially when dielectrics are

deposited on the surface using a plasma and the density of the

deposit may vary, is the possible presence of mobile charges

within the dielectric. Mobile charges can lead to hysteresis in the

C-V curves as shown in FIGURE 3.10. The reduction in hys-

teresis for the sulphided sample may be due to reduced mobile

charge compared to the dielectric-only sample. The shift of the

Cleaning and passivation of GaAs and related alloys

SiN

only

capacitance (pF)

min

S +SiN

010

voltage (V)

–10 20

FIGURE 3.10 C-V curves with ECR SiN

on 1 × 10

n-GaAs and

S+SiN

on 5 × 10

n-GaAs.

ﬂat-band position towards zero may also be due to reduced ﬁxed

charge. However, the behaviour displayed in FIGURE 3.10 is not

necessarily due to mobile charge. The same behaviour can also

occur with the charging and discharging of ﬁxed traps. For sili-

con nitride dielectrics, hysteresis is more likely due to charging

and discharging of ﬁxed traps within the insulator rather than to

mobile charges.

To determine the surface or interface-state density from a C-V

curve, a Terman analysis is performed [17]. When there is a high

density of surface states, a Terman analysis generally generates

a U-shaped curve of the number of surface states per unit area

per unit energy (number/cm

/eV) with the fewest number of states

being located towards the middle of the gap; other curve shapes

are also observed (FIGURES 3.13, 3.18 and 3.19).

The effect of PECVD SiN

on n-GaAs with and without treat-

ment with (NH

)

is shown in FIGURES 3.11–3.13 [18]. The

nitride was grown with SiH

,NH

and N

at the lowest RF

power that would sustain the plasma. Nevertheless, there would

be ion-bombardment damage and an H-rich nitride would form, as

evidenced by the refractive index of 1.8 instead of the ideal of 2.0

for Si

. The nearly ﬂat line in the C-V curve for unpassivated

surfaces indicates strong pinning of the Fermi level due to their

high interface-state density.

no sulphur treatment

sulphur treated

100

capacitance (pF)

before PMA

–5 5 15

no sulphur treatment

sulphur treated

100

capacitance (pF)

after PMA at 450

°C

–5 5 15

gate voltage (V)

–15 25

gate voltage (V)

–15 25

FIGURE 3.11 Effect of S on

C-V curves before and after

thermal anneal at 450

◦

C. (From

Remashan and Bhat [18].)

Thermal annealing did not change this behaviour for the unpas-

sivated sample. In contrast, thermal annealing has a clear effect on

the sulphided interface. Before annealing, the passivated sample

does not show accumulation behaviour. After annealing at 400 and

450

◦

CinN

for 5 min, well-deﬁned depletion and accumulation

regions are observed. The effects of higher-temperature anneals

are shown in FIGURE 3.12. A clear improvement occurs between

450 and 500

◦

C. However, between 500 and 550

◦

C, results are

mixed. A sharper rise is obtained in the C-V curve. The authors

100

Cleaning and passivation of GaAs and related alloys

ascribe the improvements to H originating in the dielectric deposit.

However, while annealing at 500

◦

C did not change C

min

from the

original 35 pF, the 550

◦

C anneal reduced it to about 20 pF. This

correlates with about an order of magnitude reduction in the dop-

ing level. This may be due to H from the dielectric passivating the

Si donors or to Ga diffusing into the dielectric to form acceptor-

like Ga vacancies. Given the high levels of H typically found in

PECVD nitrides and its facility for diffusion and passivation of

dopants and defects, some role for H is almost certainly present.

The results of Terman analysis of the samples in FIGURE 3.12

are shown in FIGURE 3.13. Higher temperatures reduce the num-

ber of interfacetraps, D

, between 0.6 and 0.8 eV above the valence

band to the low 10

to the high 10

range with a midgap value of

8 × 10

−2

−1

. Even though this represents a considerable

improvement in the interface and its C-V behaviour, there is still

a large amount of hysteresis due to slow traps at the interface. It is

worth noting that the high-frequency method used to determine the

relatively low D

values only demonstrates that the fast interface

states are reduced appreciably by the processes employed.

–15–5 5 15 25

100

after PMA at 450°C

capacitance (pF)

–15–5 5 15 25

100

after PMA at 500°C

capacitance (pF)

gate voltage (V)

–15–5 5 15 25

100

after PMA at 550°C

capacitance (pF)

ate volta

e (V)

FIGURE 3.12 Effect of

annealing temperature on C-V of

sulphided GaAs. (From Remashan

and Bhat [18].)

3.3.3 Passivation for improved semiconductor regrowth

For the growth of the highest quality crystalline semiconductors

by either MOCVD or MBE, it is important to start with a surface

free of oxide or other contaminants. While an oxidised surface

may be rendered oxide free by heating in vacuo or, even better,

under a ﬂux of the group V source gas, the ability of chalcogens

like S and Se to retard oxidation has been harnessed to improve

surfaces for regrowth.

1E+14

1E+13

1E+12

1E+11

(cm

–2

–1

)

450°C, 5 min.

500°C, 5 min.

550°C, 5 min.

0.00.40.8 1.2

E–E

(eV)

PMA temp. and time

FIGURE 3.13 Density of interface states from Terman analyses of C-V

curves in FIGURE 3.12. (From Remashan and Bhat [18].)

101