41-2 Industrial Communication Systems
As.shown.in.Figure.41.1,.the.Neuron.Chip.implements.a.three-processor.architecture.with.shared.
memory,.which.includes.the.rmware.ROM,.an.EEPROM.for.the.user.application.program,.and.RAM..
Each.of.the.three.processors.handles.a.certain.task:
e
.media access control.(MAC).processor.sends.and.receives.messages.to.and.from.the.communi-
cation
.medium.with.support.of.the.transceiver,.which.handles.the.line.coding.for.a.specic.medium..
Since.many.dierent.transceiver.types.exist,.a.wide.range.of.communication.media.can.be.used,.such.
as.twisted.pair,.power.line,.ber.optics,.and.radio.frequency..e.network processor.handles.the.upper.
layers.of.the.LonTalk.protocol,.which.are.described.in.the.next.section..And.the.application processor.
runs.the.user.application.implementing.the.specic.task.of.the.node.
e
.communication.among.the.three.processors.is.realized.in.shared.RAM.by.communication.buf-
fers
.and.ags..ere.are.input.and.output.buer.queues.storing.messages.to.be.forwarded.to.the.other.
processors..Special.ag.bytes.indicate.that.the.other.processor.should.do.a.certain.action,.such.as.creat-
ing,
.sending,.or.receiving.a.message.
Peripheral
.hardware,.such.as.sensors.and.actuators,.are.connected.to.a.set.of.I/O.pins,.which.can.be.
congured.in.a.range.of.single.bit.input.and.output.for.switches.or.LEDs.via.nibble.and.byte.input.and.
output.up.to.higher.I/O.protocols,.such.as.serial.and.parallel.interfaces,.I
2
C,.and.Magcard.
ere
.are.also.alternatives.to.the.Neuron.Chip..For.example,.LOYTEC.oers.a.more.powerful.ARM7-
based
.embedded.controller.(LC3020).that.implements.the.LonTalk.protocol.according.to.CEA-709.as.
well..It.also.supports.LonWorks/IP.(standardized.as.CEA-852.[8]),.where.LonTalk.messages.are.tun-
neled
.over.LAN.or.Internet.in.IP.packets..Such.controllers.are.used.for.more.complex.tasks,.like.panels.
with.a.graphical.user.interface.or.IP.routers.
To
.identify.the.LonWorks.nodes.in.the.network,.each.Neuron.Chip.has.a.xed.48.bit.identier.called.
Neuron ID.assigned.by.the.manufacturer..A.LonWorks.node.can.actively.transmit.its.Neuron.ID.in.a.
service pin message,.when.a.special.service.pin.is.pressed.on.the.node..is.simplies.the.network.inte-
gration,
.when.new.nodes.have.to.be.added.to.the.network,.because.it.is.not.required.to.enter.the.Neuron.
ID.manually.in.the.management.tool..Instead,.the.management.tool.simply.has.to.wait.for.the.service.
pin.message.
During
.conguration,.a.logical.address.is.assigned.to.each.node..It.consists.of.the.domain,.subnet,.
and.node ID..e.domain.represents.a.whole.LonWorks.network,.which.is.identied.by.the.domain.ID.
with.up.to.6.bytes.length..Direct.message.passing.among.domains.is.not.possible,.but.it.can.be.done.via.
gateways.
MAC
processor
Control
Network
processor
Timer/
counter
Application I/O
Network
Com. Port
CP 0 ... 4
To transceiverTo application specic HWClockServiceReset
IO 0 ... 10
Appl.
processor
ROM
EEPROM
RAM
Address bus (16 bit) Data bus (8 bit)
FIGURE 41.1 Structure.of.a.Neuron.Chip.
© 2011 by Taylor and Francis Group, LLC