Middleton W.M. (ed.) Reference Data for Engineers: Radio, Electronics, Computer and Communications

42-20

REFERENCE

DATA

FOR

ENGINEERS

4

GIGABYTES

ADDRESS

(HEX)

(0000)

0000

(0000)

0004

(0000)

7FF0

(0000)

7FF4

(0000)

7FF8

0000

7FFC

0000

8000

.FFFF‘ 7FFC

(FFFF) 8000

(FFFF)

8004

(FFFF) 8008

(FFFF) FFFO

(FFFF) FFF4

(FFFF) FFFS

(FFFF) FFFC

Fig.

10.

Short-addressing model for memory in the

68000

family.

contained in

A5

This technique is used extensively in

programs written for the Macintosh computer.

Relative addressing is used to access constant data

that is stored in the same block

of

memory as the

program instructions themselves, Instead of specifying

the absolute address of the operand, relative addressing

specifies a relarive displacement-the difference be-

tween the instruction address and the operand address.

When the program runs, the instruction address (con-

tained in the

PC)

and the relative displacement (contain-

ed in the extension word) are added to form the effective

address of the operand. Instructions and operands that

use relative addressing are position independent-the

difference between instruction and the operand address-

es remains constant even if the program and its constant

data are picked up and moved to

a

different block

of

memory. Like based addressing, relative addressing is

used extensively in position-independent programs writ-

ten for the Macintosh and other computers.

The full

68000

processor and other “complex in-

struction-set computer” (CISC) processors provide

many more addressing modes than shown here, in an

attempt to provide efficient access to the data structures

that are most commonly used in programs. For exam-

ple, the

full

68000

has “autoincrement” and “auto-

decrement” modes that are often used to access push-

down stacks, and based-indexed and memory indirect

modes that are used to access arrays of records and

records of arrays.

’

32

KBYTES

32

KBYTES

In contrast, RISC processors are normally character-

ized by the dearth of addressing modes that they

support. In fact, typical RISC processors support only

two of the addressing modes described in detail above

-immediate and register indirect. Using just these two

modes, a RISC processor can emulate any of the more

complex addressing modes using a sequence of simple

instructions that combine and adjust address values in

whatever way

is

desired.

Operands

and

Operations

The first

part

of Table

4

contains double-operand

instructions. Most instructions have three variations,

indicated by

“.B,”

“.W,”

and

“.L”

suffixes, for

operating on byte, word, and longword data.

Each double-operand instruction has a “source”

operand and a “destination” operand. The

68000

restricts the addressing modes that can be used to

specify operands depending on the type of the operand

(source or destination), the size of the operand (byte,

word, or longword), and the instruction (e.g., MOVE vs

MOVEA). In Table

4,

asrc

denotes the most general

source operand, which may use any addressing mode

(unless the operand is a byte, in which case address

register direct addressing is not allowed).

A

dsrc

operand may use any mode except address register

direct. Similar restrictions apply to the destination

operand types

adst

and

ddst,

with the additional

42-21

~

0011

101

000

111

100

$1234

0011

000

111

000

(AjM0VE.W

‘$1234.

D5

110

IO011

I

101

I

000

1

111

I

000

1

$4322

(5)

MOVE.

W

$4322, D5.

IO011

1

000

I

111

I

111

I

000

I

$2222

I

(C)

MOVE.

W

D6,

$5432

Fig.

11,

Encodings

of

various

machine instructions.

$4444

(0)

MOVE.

W

$2222, $4444

restriction that immediate and relative addressing

are

not allowed. In some cases, operands may be only an

address register or a data register; these are explicitly

indicated in the table as An or Dn, respectively.

Special cases like the ones described above

are

the

sort of thing that drives compiler writers crazy, and

historically motivated the architecture of RISC micro-

processors. In a typical RISC microprocessor, any

register may be used as the source or destination of any

operation, and any operation can use any register.

However, memory can be accessed only with two basic,

essential instructions-LOAD (from memory) and

STORE (into memory). As a result, a compiler has a

much better chance of using all of the resources of the

processor in an efficient manner.

Now we return to the operations of the 68000. The

MOVE instructions simply copy data from one place to

another-the operand specified by the

src

field is

copied to the place specified by the

dst

field, without

disturbing the

src

data. Since

src

and

dst

may use

different addressing modes, a

MOVE

instruction can

copy from register to register, register to memory,

memory to register, or memory to memory. The MOVES

are the only instructions that provide all these address-

ing options; other instructions do not provide memory-

to-memory operation or register-to-memory operation

(except arithmetic on data registers).

The MOVE instructions affect four of the condition

code bits as a side effect. The condition code bits store

information about the results of most operations. For

example, when affected the

zero bit

(Z)

is set to

1

if the

instruction produces a zero result (all bits

0),

and to

0

if

the instruction produces a nonzero result. An instruc-

tion that affects the

2

bit can be followed by a

conditional branch instruction

to perform one of two

possible actions depending on the value of

2,

as we will

describe at the end of this section.

MOVEA is a special version of the MOVE instruction

used only when the

ds

t

operand is an address register.

Its encoding is consistent with that of MOVE, and it

differs only in that it does not affect the condition codes;

this reflects the 68000 designers’ philosophy that the

“arithmetic” value of an address should have

no

significance, and that address registers should contain

only addresses. In keeping with this philosophy, note

also that instructions with single-byte operands cannot

have an address register as an

src

or

dst

operand,

since in the 68000 addresses are never as short as one

byte.

The LEA instruction is sort of a half-hearted MOVE.

Rather than actually read its operand, LEA merely

computes the effective address

of

the operand and

deposits it in an address register for later use. This

instruction is a result of the 68000 designers’ philoso-

phy that, while 32-bit addresses are “expensive” (it

would waste a lot of program memory to carry one or

two addresses in every instruction), address

registers

are

“cheap” (there are eight of them available). Therefore,

if a memory operand is going to be referenced more

than once, it makes sense to compute its address only

once and keep the address lying around in an address

register where it can be quickly and inexpensively used

later as needed. We will address this subject in more

detail in a later section on Indirect Addressing. But

before leaving LEA, also notice that in keeping with the

68000 designers’ philosophy about the nature of ad-

dresses, the LEA instruction does not affect the condi-

tion bits.

The

ADD

instructions perform a twos-complement

addition

of

a source operand and a data register, and

store the result in the data register. The condition codes

are affected,

so

that an

ADD

may be followed by a

conditional branch to test the value of the result. The

AND

instructions are similar to the

ADDS,

except that

they perform a bit-by-bit logical

AND

of their operands.

The

ADDA

instructions add to an address register;

there is no byte version of this instruction since

addresses are never only 8 bits wide. An

ADDA

instruc-

tion is typically used to compute the address of a

particular item in a complex data structure. Like other

instructions with address-register destinations,

ADDA

does not affect the condition bits.

The CMP and CMPA instructions subtract an

src

operand from a register, and set the condition codes

according to the result, without affecting either oper-

and. Thus, CMP and CMPA may be used to compare two

operands for equality or other relationships, without

disturbing the current values of the operands.

The second part

of

Table

4

contains instructions that

have just one destination operand. The CLR instructions

set their operand to

0,

obviously useful for initializing

variables. The NOT instructions complement each bit of

their operand, useful in conjunction with

AND

instruc-

tions for isolating bits in a single byte or word where

different bits or fields contain unrelated data. Note that

these instructions do not work on address registers,

once again because of the philosophy that addresses

have no arithmetic or bitwise significance.

The third

part

of Table

4

contains “program control”

instructions that can affect the normally sequential

fetching and execution of instructions. The BNE and

BEQ instructions add an offset value to the PC if the

2

bit is

0

or

1,

respectively. Otherwise, execution contin-

ues with the next instruction.

The

68000

processor interprets the

o

f

s

e

t

field of

a branch instruction as a signed, twos-complement

integer in the range

-

128

to

+

127.

Since instructions

must

start

on even addresses (word boundaries), the

range

is

actually restricted

to

-128

to

+126.

At the

time that the processor tests the branch condition,

the PC

is

already pointing to the next instruction, and

so

the branch offset is limited

to

-128

to

+126

bytes

from the next instruction.

According to this convention; if the branch offset is

0,

the next instruction should be executed whether the

condition

is

true or false. However, since such an

instruction performs no useful work and would there-

fore never be used, the designers of the

68000

used the

o

f f

se

t

=O

case to specify another instruction type

in

the full instruction set. Also, since instructions are

aligned on word boundaries, odd offsets such as

-

127

are not used; the

68020

uses this to encode yet another

instruction type.

The

JMP

instruction in the

68000

is equivalent to the

GOT0

instruction in

C,

Pascal, and most other high-

level languages. It unconditionally transfers control to

an

instruction starting at the destination address. It does

this by simply replacing the current value of the

PC

with

the destination address.

The

JSR

and

RTS

instructions are used

to

call and

return from subroutines, as we will discuss in detail in a

later section on Subroutines.

A MACHINE LANGUAGE

PROGRAM

Table

7

shows the values stored in memory for a

sequence of instructions and data that form a program

for multiplying

123

by

456.

A list of machine instruc-

tions stored in memory, as defined by the two left-hand

columns

of

the table, is called a

machine language

program.

Even though they don’t mean much

to

a

human reader, these two columns completely specify

the operations to be performed by the computer. The

remaining columns of Table

I

are

an

assembly-language

TABLE

7.

MEMORY CONTENTS

FOR

A

SEQUENCE

OF

INSTRUCTIONS

AND

DATA

Machine Language Assembly Language

Address Contents Label Opcode Operand

(hex)

(hex) (sym) (mnem) (sym) Comments

00000000

00001000

00001002

00001004

00001006

00001008

OOOOlOOA

0000100c

OOOOlOOE

00001010

00001012

00001014

00001016

00001018

OOOOlOlA

0000101c

OOOOlOlE

00001020

Program to multiply

MCND

by

MPY.

*

4240 MULT

3238

l0lC

670A

DO78 LOOP

lOlE

D27C

FFFF

66F6

31CO DONE

lOlA

4EF8

7008

????

PROD

007B MPY

01C8 MCND

MON

ORG

CLR

.

W

MOVE.

W

BEQ

ADD.

W

ADD.

W

BNE

MOVE.

W

JMP

DS.W

DC.W

EQU

END

$1000

DO

MPY, D1

DONE

MCND, DO

#-1,

D1

LOOP

DO, PROD

MON

1

123

456

$7008

MULT

DO

will

accumulate product.

D1

holds loop count (multiplier).

Done

if

count

is

down to zero.

Else add

MCND

to product

and do loop

MPY

(Dl)

times.

Save product.

Return

to

debug monitor.

Storage

for

PROD.

Multiplier value.

Multiplicand value.

Address

of debug monitor.

Symbol Table

~~

00007008

DONE 00001012

LOOP

00001008 MCND OOOOlOlE

MON

MPY 0000101c

MULT

00001000

PROD

OOOOlOlA

Notes: hex

=

hexadecimal; sym

=

symbolic; mnem

=

mnemonic.

COMPUTER ORGANIZATION AND PROGRAMMING

42-23

program

that gives the same information in a much

more understandable symbolic form. In the next two

subsections, we will discuss assembly language and

then describe the actual behavior of the machine-

language program.

Assembly Language

Machine language and assembly language are not the

same thing. The

machine language

of a computer is the

set of bit strings recognized as instructions; the actions

performed by each machine instruction are defined by

the computer hardware.

Assembly language

is a software

tool, a symbolic language that can be directly translated

into machine language by a system program called an

assembler.

The output

of

an assembler is an

object

module

containing the bit strings that make up the

machine language program, and information that tells a

loader

program where to place these bit strings in the

computer memory.

The process of developing programs in assembly

language is illustrated in Fig.

12.

A

typical programmer

uses a

text editor

to create a text file containing an

assembly language program. The names

sourceJile

and

source program

are often used for assembly language

and high-level language text files. The assembler ac-

cepts a source program as input, checks for format

errors, and produces an object module containing the

machine language program. A loader then loads the

object module into the memory of the target machine.

There the machine language program is run, possibly

with the aid of a

debugger.

The loader, debugger, and machine language pro-

gram described above

must

run on the target machine;

the text editor and assembler may run there or on a

different machine.

An

assembler that runs on one

machine and produces object modules for another is

called a

cross assembler.

For example, it is possible to

create an assembly language program by using a text

editor on a laptop computer, transfer the source file by

using a serial data link to a workstation that runs a cross

assembler, and transfer (or

download)

the object mod-

ule to a loader in an embedded microcomputer by way

of another serial data link.

Although every computer manufacturer defines a

standard assembly language for a new machine when

it

is introduced, other vendors may define different as-

sembly languages for the same machine. While the

effect

of

each machine language instruction

is

fixed

in

hardware, the person who defines an assembly language

is free to specify:

A mnemonic for each machine language instruction

A

standard format for the lines of an assembly

language program

Formats for specifying addressing modes and other

instruction variations

Formats for specifying character and integer con-

stants in different bases

Mechanisms for associating symbolic names with

addresses and other numeric values

Mechanisms for defining constant data to be stored

in memory along with the instructions when the

program is loaded

Directives that specify how the program is to be

assembled

In a typical assembly language for the

68000

or any

other processor, each line has four fields arranged as

shown below:

LABEL

OPCODE

OPERANDS

COMMENTS

The

LABEL

field is optional.

A

label

is

simply an

identifier (or

symbol

in assembler parlance), that is,

a

sequence of letters and digits beginning with a letter.

Every symbol in an assembly language program is

assigned a value at the time that it is defined; the

assembler program keeps track of labels and their values

KEYSTROKES ASSEMBLER

OBJECT

MODULE

I

DEBUGGER

I

-

- - -

-

I

-----A

I

Fi-

GEE

Fi

J

___--

MACHINE

Fig.

12.

Assembly language program development.

REFERENCE

DATA

FOR ENGINEERS

by an internal

symbol table.

For example, in the

statement below,

START M0VE.W

XX,DO

DO

:=

con-

tents

of

memory location

XX.

the value of the symbol START equals the memory

address at which the

MOVE.

W

instruction is stored. In

general, the value of a symbol is the memory address at

which the corresponding instruction or data value is

stored (except with the EQU pseudo-operation, de-

scribed later). Each symbol may be defined only once,

but may be referenced as often as needed.

Symbols only have values at the time a program is

being assembled, that is, at

assembly time.

Symbols

exist in the source text of the program, and in the

environment

of

the assembler, but do not appear in the

machine-language program. For instance, when our

example program is loaded into memory (at

load time)

or

is actually run (at

run time),

there is no way to

discover, simply by looking at the object module or at

memory, that the programmer had associated the sym-

bo1 MULT with address

$00001000,

or

even that there

had been a symbol MULT at all. (However,

symbolic

debuggers

may access this information in the run-time

environment by referring to a copy of the source code

and the symbol table that were used by the assembler.)

The OPCODE field contains the mnemonic

of

either a

machine instruction or a pseudo-operation or assembler

directive. In

68000

assembly language, many opcode

mnemonics have a

size

SUB

of

.B,

.

W,

or

.L

to

indicate the size of the operands and operation. The size

suffix

is

optional for operations that have only one size

(such as

LEA).

Depending on the contents

of

the OPCODE field, the

OPERAND field specifies zero or more operands sepa-

rated by commas. An operand is an expression consist-

ing

of

symbols, constants, and operators such as

+

and

-.

The simplest expression consists

of

a single symbol

or constant.

In

68000

assembly language, a sequence of decimal

digits denotes a

decimal constant,

and a sequence

of

hexadecimal digits preceded by

$

denotes a

hexadeci-

mal constant. Character constants

are surrounded by

single quotes (e.g.,

A

’

)

and have the corresponding

ASCII value.

The COMMENTS field is ignored by the assembler,

but it is used by the programmer to convey a high-level

explanation of the program to human readers. It is also

possible to use an entire line as a comment

by

placing

and asterisk

(*)

at the beginning of the line.

Four different

assembler directives

appear in Table

7;

their functions are described below:

*

ORG

(origin). The operand is the address at which

the next instruction or datum is to be deposited

when the program

is

loaded into memory. Subse-

quent instructions and data are deposited in succes-

sive memory addresses.

DS

.

W

(define storage-word). The operand is a

number of memory words to be skipped without

storing any instructions or data, thereby reserving

space to be used by variables in a program.

DC

.

W

(define constant-word). The specified

word value is stored into memory when the pro-

gram is first loaded into memory, thereby estab-

lishing a constant value that may be accessed when

the program is run.

EQU

(equate). The identifier in the label field

is

assigned the value in the operand field, instead

of

the value in the address field. This makes the

identifier a synonym for a constant value for the

duration of the assembly process.

END (end assembly). This pseudo-operation de-

notes the end of the text to be assembled. Its

operand, if present, is the address

of

the first

executable instruction of the program.

Of course, there are many other directives

in

a

full

assembly language, and different assembly languages

may use different names and conventions for the same

thing.

The input of an assembler is the text file containing

the source code, while the output consists of an object

module (or “object file” or “binary file”) and a listing

similar to Table

7.

To understand a little more about how an assembler

works, it is useful to examine the Address column in the

listing. The Address column indicates the address at

which the assembler “thinks” that it should assemble

the instruction on the current line. By default, this

address is initialized to zero.

The

ORG

directive tells the assembler to start assem-

bling subsequent instructions starting from a new ad-

dress, and hence changes the Address column on the

assemble any instructions or data and therefore do not

affect the Address column at all. Others, such as

DS

.

W,

advance the Address value but do not cause anything to

be loaded into the corresponding memory location at

load time.

For its own and the programmer’s use, the assembler

creates a

symbol table

that lists the numeric value

associated with each symbol. As evident in Table

7,

in

most cases the symbol receives the value of the Address

column in the line in which

it

is defined, except

in

the

case of EQU statements, which assign the symbol the

value in the Operand column. In all cases, the symbols

and their values exist only at assembly time.

Many instructions in the

68000

are more than one

word long. It is therefore convenient to compress the

program listing, showing all words associated with the

same instruction on one line as in Table

8.

OPERATION

OF

A

SIMPLE

PROGRAM

We are now ready to explain the program in Table 8.

It multiplies

MCND

by

MPY

by initializing the product to

0

and then adding

MCND

to it

MPY

times.

Notice that the values of the multiplier and multipli-

cand are “passed” to the program in fixed memory

locations,

$101A

and

$101C,

that are initialized to

123 and 456 when the program is loaded. If, after

loading the program, we start the program at location

$1000,

it will indeed compute the product of 123 and

456.

Alternatively, if after loading the program we

place different numbers in locations

$101A

and

$10

1

C,

then the program will compute the product of

the new numbers. In any case, the program “returns”

its result by placing the result in memory location

$1018,

which may be examined by whoever ran the

program in the first place.

The program uses registers to accumulate the product

(in

DO)

and to keep track of the multiplier count (in

D1

j,

because registers can be accessed faster than main

memory in most computers, and hence the program

will run faster. In fact, we could optimize the program

to run even faster by placing

MCND

into a register (say

D2)

before entering the multiplication loop.

The program execution

is

traced by Table

9,

which

shows the values

of

relevant registers and memory

after

each instruction is executed. Only the low-order words

of

PC,

DO,

and

D1

are shown; the high-order words are

not affected by this program. During its execution, the

program executes 374 instructions, including three

instructions in a loop that is executed 123 times.

So,

the program begins by setting

DO

to zero and

copying

MPY

into

D1.

The

MOVE

instructions set the

condition bits in

CCR

according to the value stored. In

particular, the

Z

bit is set to 1 if a zero value

(0000,,)

was stored, or else

2

is cleared to

0.

Therefore,

if

MPY

is zero, the

Z

bit is 1 when the

BE&

DONE

instruction is

first reached, and the branch will be taken, leaving zero

in

DO.

The purpose of this instruction

is

to

exit the

program with a product of

0

if the multiplier happens to

be zero. Notice that the branch instruction gives a

relative

oflsset

of

$OA,

so

that either the next instruction

(at address

$1008)

or the instruction at the branch

offset (address

$1008+$OA

=

$1012)

is executed.

If the

BEQ

branch

is

not taken, then the two

ADD

instructions add

MCND

to the product in

DO

and subtract

1 from the loop count in

D1.

Like a

MOVE

instruction,

an

ADD

instruction sets

2

to

1 if

its

result is zero. Thus,

if

D1

has

not

been reduced to zero, the

BNE

instruction

will branch back to address

$1008.

(The 8-bit signed

offset

$F6,

interpreted in twos-complement, equals

-$OA;

hence the branch is to address

$1012-$OA

=

$1008.)

Eventually, after executing the loop 123 times, the

program reaches the

MOVE

instruction at address

$10

12,

which saves the accumulated product in mem-

ory. Finally, the program unconditionally jumps to

address

$7008,

where we assume there exists a debug

monitor that prints out or gives the user some way to

examine the computational result stored at location

$1018.

Indirect Addressing

The program in Table

8

manipulated only simple

variables and constants. More complicated data struc-

tures such as arrays, stacks, queues, records, and lists

are used in almost all programs. Consider the problem

TABLE 8. COMPRESSED PROGRAM

LISTING

Machine Language Assembly Language

Address Contents Label Opcode Operand

(hex) (hex) (sym) (mnem) (sym) Comments

*

00000000

Program to multiply MCND by MPY.

00001000

4240

MULT CLR.W DO DO will accumulate product.

00001002 3238 lOlC M0VE.W MPY,Dl D1 holds loop count (multiplier).

00001006 670A BE4 DONE

Done

if

count is down to zero.

00001008 DO78 lOlE

LOOP

ADD.W MCND,DO Else add MCND to product

~OOOlOOC D27C FFFF ADD.W #-1,Dl and do loop MPY (Dl) times.

00001012

31120 lOlA DONE M0VE.W D0,PROD Save product.

00001016 4EF8

7008

JMP

$70

0

8

Return to debug monitor.

OOOOlOlA

????

PROD

DS.W

1

Storage

for

PROD.

OOOOlOlC

007B

MPY

DC.W 123 Multiplier value.

OOOOlOlE 01C8 MCND DC.W 456 Multiplicand value.

00001020 MON EQU $7008 Address of debug monitor.

00001020 END MULT

00000000

ORG

$1000

*

00001010

66F6 BNE LOOP

REFERENCE

DATA

FOR ENGINEERS

TABLE

9.

REGISTER

AND

MEMORY CONTENTS AFTER EXECUTING INSTRUCTIONS

IN

MULTIPLICATION PROGRAM

MEM[1018]

Step Instruction

PC

DO

D1

Z

(

PROD

)

...

1000

????

?

????

1

CLR.W DO

1002

0000

????

1

????

2

M0VE.W MPY,Dl

1006

0000

007B

0

????

3

BEQ DONE 1008

0000

007B

0

????

4 ADD.W MCND,DO l0OC 01C8 007B

0

????

5

ADD.W #-1,D1

1010

01C8 007A

0

????

6

BNE LOOP 1008 01C8 007A

0

????

7

ADD.W MCND,DO l0OC 0390 007A

0

????

8

ADD.W

#-l.Dl

1010

0390 0079

0

????

9

BNE LOOP 1008 0390 0079

0

????

10

ADD.W MCND,DO l0OC 0558 0079

0

????

11

ADD.W #-l,Dl

1010

0558 0078

0

????

12

BNE LOOP 1008 0558 0078

0

????

0

367

368

369

370

37

1

312

313

314

...

ADD.W MCND,DO

ADD.W

#-1,D1

BNE LOOP

ADD.W MCND,DO

ADD.W #-l,D1

BNE LOOP

MOVE.

W

DO, PROD

JMP $7008

l0OC

1010

1008

l0OC

1010

1008

1016

7008

D950

DB

18

DB18

0002

0001

0000

0

????

0

????

0

????

0

????

1

????

1

????

0

DB18

0

DB18

Subroutines

of initializing the components of an array

of

five bytes

to zero. An assembly language solution is shown in

Table

10.

Note that the operand expressions

Q+l,

Q+2,

and

so

on

are evaluated at assembly time. The choice

of

a five-component array above was very judicious-the

corresponding program for a 100-component array

would have

101

instructions!

Indirect addressing

avoids

this problem by taking the address from

an

address

register at

run

time. Thus we can write a loop to

initialize an array, in which an address register points to

a different array element

on

each iteration of the loop.

The program in Table

11

solves the array initializa-

tion problem by using indirect addressing. As shown in

Fig.

13,

it initializes

A0

to point to the first component

of

Q,

and

A1

to point just past the last component of

Q.

Then it executes a loop that clears successive compo-

nents of

Q,

incrementing

A0

once per iteration of the

loop. The CMPA instruction compares the contents

of

A0

with

A1

,

which was initialized to contain the address

just past the last array component. CMPA sets

Z

to

1

if

A0

and

A1

are equal, which causes the BNE instruction

to terminate the loop.

Notice the use of the LEA instruction in Table 11, in

particular the second one, which initializes

Al.

Per-

forming this initialization outside the main

loop

reduces

the length and execution time of the instructions inside

the loop. An obviously less desirable alternative would

have been to put the LEA instruction inside the loop,

right before CMPA.

Not

only does the program in Table

11

occupy fewer

bytes than the one in Table

10,

but it also stays the same

length for an array of any size. The program is easily

modified to work

on

a different length array by changing

the occurrences of the length

“5”

to the desired length.

Many other variations

on

indirect addressing are

found in the full 68000 and most other CISC proces-

sors.

RISC

processors,

on

the other hand, typically

have register indirect addressing as their one and only

memory addressing mode.

A

subroutine

is the machine language equivalent of a

procedure or function in C, Pascal, and other high-level

languages: a sequence of instructions, defined and

stored only once, that may be invoked (or

called)

from

many places.

In

order to use subroutines, we need

instructions to save the current value of the

PC

(the

return address)

each time the subroutine is called, and

restore it when the subroutine is finished.

In

the 68000,

these instructions save and restore

PC

by use of a stack.

A

pushdown stack

(or simply a

stack)

is a one-

dimensional data structure in which values are entered

and removed one item at a time at one end, called the

top

of

stack.

A

register called the

stack pointer

(SP)

points to the top of stack. An item is entered by a

push

operation that advances the stack pointer to the next

available memory location and then stores the item at

the top of stack. An item is removed by a

pop

operation

that removes the item at the top

of

stack and then backs

up the stack pointer.

In

the 68000, the

JSR

and

RTS

instructions perform

subroutine calls and returns using address register

A7

(also called

SP)

as a stack pointer. Any 68000 program

42-27

3002

3004

3006

3008

TABLE

10.

mITIALIZING

AN

ARRAY

THE

HARD

WAY

3100

*.

-

I

-1

A0

-

CLR.B

(AO)

0DA.W #,A0

0001

~~

Machine Language Assembly Language

Address Contents Label Opcode Operand

(hex) (hex) (sym) (mnem) (sym) Comments

00000000

ORG

$3000

Set

components of

Q

to zero.

00003000 4238 3100

INIT

CLR.B

Q

First

component.

00003004 4238

3101

CLR.B

Q+1 Second component.

00003008 4238 3102

CLR.B

Q+2 Third component.

0000300C

4238 3103

CLR.B

Q+3 Fourth component.

00003010 4238 3104

CLR.B

Q+4 Fifth component.

00003014 4EF8 7008

JMP

MON

Return to debug monitor.

00003018

ORG

$3100

00003100

????

Q

DS.B

5

Reserve

5

bytes for

array.

00003105

MON

EQU

$7008

Address

of

debug monitor.

00003105

END

INIT

z

8

2

w

P

N

E

that uses subroutines is required to reserve a small area

of memory for a pushdown stack for return addresses.

At the beginning of such a program, the stack pointer

SP

must be initialized to point at this area by a

MOVE

.

W

#addr

,

SP

instruction.

As shown in Fig.

14,

SP

points to the top item in the

stack, or just past the stack area if the stack is empty.

SP

is decremented by 2 before each word is stored on the

stack, and incremented by 2 after each word is popped

from the stack.

Since a return address may be up to 32 bits wide, two

words on the stack

are

used for each return address. As

usual, the high-order word of the 32-bit return address

is stored in the lower-numbered address.

ADDRESS

MEMORY

The

JSR

addr

instruction saves the address of the

next instruction by pushing it onto the stack and then

jumps to the instruction at location

addr,

the first

instruction of the subroutine. At the end of the subrou-

tine,

RTS

pops an address from the stack into

PC,

effecting a return to the original program sequence.

A stack is the most appropriate data structure for

saving return addresses, because it can store more than

one return address when subroutines are

nested,

that is,

when one subroutine calls another. The number of

levels of nesting is limited only by the size of the

memory area reserved by the programmer for the stack.

A detailed example program using subroutines is

presented in Table 12. Before describing it, we should

CMPA.W #,A0

BNE

F4

3010

3012

L

8

2

E

L1

v)

r(

3100

0

00003 102

00003103

00003 104

00003105

3101B;;

I

121

;

3102

=,

DONE

3103

3104

Fig.

13.

Effects

of

indirect addressing.

42-28

TABLE

1 1.

INITIALIZING

AN

ARRAY

BY

USING

INDIRECT ADDRESSING

Machine Language Assembly Language

Address Contents Label Opcode Operand

(hex) (sym) (mnem)

(vm)

Comments

(hex)

00000000

ORG

$3000 Set components

of

Q

to zero.

00003000

41F8

3100

INIT

LEA.L

Q,AO

A0

points to

first

component.

00003004 43F8

3105

LEA.L

QEND,Al

A1

points just past

array

end.

00003008

4210

ILUP

CLR.B

(AO)

Clear

byte

that

A0 points to.

0000300A DOFC 0001

ADDA.W

#1,AO

Point to next byte.

0000300E

B1C9

CMPA.L

A1,AO

Past the end?

00003010 66F6

BNE

ILUP

Nope, keep clearing.

00003012 4EF8 7008 JMP

MON

Yep,

return to debug monitor.

00003016

ORG

$3100

00003100

????

Q

DS.B

5

Reserve

5

bytes

for

array.

00003105

QEND

EQU

Q+5

Address

of

byte just past

Q.

00003105

MON

EQU

$7008 Address

of

debug monitor.

00003105

END

INIT

point out a few additional assembly language pseudo-

operations and features that it uses:

*

DS

.

B

(define storage-byte). The operand speci-

fies a number of memory bytes to be skipped

without storing any instructions or data, thereby

reserving space to be used by. variables in a

program.

DC

.

B

(define constant-byte). The specified byte

values are stored into memory when the program is

first loaded into memory, thereby establishing a

constant value that may be accessed when the

program

is

run.

*

(program location counter). When used in an

expression, the symbol

“I”

denotes the current

address at which assembly is taking place.

INCREASING

MEMORY

STACK SIZE

I

SP

-

H

The program in Table

12

contains a main program

and two subroutines. The main program initializes

SP

to point to an 8-word stack. A stack

of

four words would

have been sufficient for the two nested subroutines in

this program, but it is a good practice to provide

“headroom” in case programming errors, modifica-

tions, or interrupts increase the space required.

The main program loads a 16-bit word into the

low-order word

of

DO

and calls a subroutine

WCNTlS

that counts the number

of

1 bits.

WCNTlS

splits the

low-order word of

DO

into two bytes and calls a

subroutine

BCNTlS

to count

1’s

in each byte. The

usefulness of subroutines is evidenced by the fact that

BCNTlS

can be called more than once and with a

different byte to be processed each time.

Fig.

15

shows the state

of

the stack after each

instruction that affects it. When

WCNTlS

returns to the

-16-

a

H

SP-

H

RETURN

-16-

H

SP-

w

RETURN

EMPTY

Fig.

14.

A

68000

return-address stack.

AFrER ONE SUBROUTINE CALL

AFTER SECOND (NESTED)

SUBROUTINE CALL

TABLE

12.

PROGRAM THAT

USES

SUBROUTINES

TO

COUNT

THE

NUMBER

OF

“1”

BITS

IN

A

WORD

Machine Language Assembly Language

Address Contents Label Opcode Operand

(hex) (hex)

(sw) (mnem)

(sym) Comments

00000000

00002000

00002004

00002008

0000200c

00002010

00002012

00002022

00002026

0000202A

0000202E

00002030

00002034

00002038

0000203A

0000203C

0000203E

00002040

00002044

00002048

0000204A

0000204C

0000204E

00002052

00002056

00002058

0000205A

0000205C

00002060

00002064

4FF8 2022

3038 2010

4EB8 2022

4EF8 7008

5B29

????

31CO

203C

1038 203C

4EB8 203E

3E0

1

1038 203D

4EB8

203E

D247

4E75

????

4241

41F8 205C

43F8 2064

1410

C400

6704

0641

0001

DOFC 0001

B1C9

66EE

4E75

0102 0408

1020 4080

MON

MAIN

TWORD

STK

STKE

*

WCNTlS

CWORD

CWORDL

CWORDH

*

BCNTlS

BLOOP

BNOl

*

MASKS

MASKE

ORG

$2000

EQU

$7008 Debug-monitor address.

LEA.

L

STKE, SP Initialize SP

(A7).

M0VE.W

TWORD,DO

Get

test word.

JSR WCNTlS Count number of

1s

in

it.

JMP

MON

Return to debug monitor.

DC.W

$5B29 Test-word to count

Is.

DS.W

8

Space for 4 return addr’s.

EQU

Initialization addr for SP.

Count the number of

‘1’

bits in

a

word,

Enter with word in DO, exit with count in

D1.

M0VE.W D0,CWORD Save input word.

M0VE.B

CWORDH,DO

Get high-order byte.

JSR BCNTlS Count

Is.

MOVE.

W

D1,

D7

Save

‘1‘

count.

M0VE.B CWORDL,DO Get low-order byte.

JSR BCNTlS Count

Is.

ADD.W

D7,Dl

Add high-order count.

RTS

Done, return.

DS.W

1

Temporary word.

EQU

CWORD+l

Low-order byte address.

EQU

CWORD

High-order byte address.

Count number of

‘1’

bits in

a

byte.

Enter with byte in

DO,

exit with count in

D1.

CLR.W

D1

Initialize

‘1’

count.

LEA.L

MASKS,AO Point to 1-bit masks

LEA.L

MASKE,Al and end of masks.

M0VE.B (AO),D2 Get next bit mask.

AND.B

DO,D2

Is

there

a

‘1’

there?

BEQ

BNOl

Skip if not.

ADD.W

#1,D1 Else increment

‘1’

count.

ADDA

.

W

#1,

A0 Point

to

next mask.

CMPA.L

A1,AO Past last mask?

BNE

BLOOP Continue if not.

RTS Return.

Define 1-bit masks to test bits of byte.

DC.B

$1,$2,$4,$8,$l0.$20,$40,$80

EQU

Address just after table.

END

MAIN

*

-

Symbol Table

BCNTlS 0000203E

BLOOP

00002048

BNOl

00002052

CWORD

0000203C

CWORDH

0000203C

CWORDL

0000203D

MAIN

00002000 MASKE 00002064

0000205C

MON

00007008

MASKS

00002012 STKE 00002022

STK

TWORD

00002010 WCNTlS 00002022

main program, the stack is again empty and

D1

contains

the 1st count. The main program terminates by jumping

to the operating system.

The individual subroutines in Table

12

are worth

discussing. On entry,

WCNTlS

expects the input word

to be in

DO,

which it writes into a memory word that is

read back as two individual bytes passed to

BCNTlS.

The memory write and reads are used because there are

no instructions to directly break out the high-order byte

of

a register.

When

BCNTlS

is entered,

it

expects the input byte

to be in

DO.

The subroutine checks each bit position for

a

1

and maintains a count in

D1

accordingly.

It

uses a

table

of

eight “mask bytes,” each having

a

1

in a

different bit position. At each iteration

of

the loop,

A0

contains the address

of

a mask byte, and a correspond-

Middleton W.M. (ed.) Reference Data for Engineers: Radio, Electronics, Computer and Communications

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