Baca A.G., Ashby C.I.H. Fabrication of GaAs Devices

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Ohmic contacts

n-type GeAuNi contact was discovered early in the history of

GaAs and has proven to be quite reliable for a wide variety of

applications. Thanks to decades of ohmic contact research, many

alternatives are available for those who desire greater thermal sta-

bility, shallower contacts or a contact better suited to the special

requirements of one’s process. Alternative contacts include those

based on solid-phase regrowth, refractory metals, bandgap engin-

eering and methods of heavily doping the GaAs surface. Research

has also yielded a better picture of the basic reactions occurring at

the GaAs/contact interface and has given insight for better ways

of achieving contact reproducibility.

Many choices also exist for p-type contacts to GaAs. In this

case, no single contact metallurgy dominates as in the case for

n-type contacts. GaAs devices requiring p-type contacts usu-

ally can provide high enough doping for making non-alloyed

ohmic contacts. GaAs devices such as HBTs require shallow,

thermally stable contacts; all GaAs devices require repeatable

processes.

REFERENCES

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(1967) p.372]

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Phys. (USA) vol.62 (1987) p.582)]

[8] L.C. Wang [Mater. Res. Soc. Symp. Proc. (USA) vol.319 (1994) p.93]

[9] R. Zuleeg, P.E. Friebertshauser, J.M. Stephens, S.H. Watanabe [IEEE

Electron Device Lett. (USA) vol.7 (1986) p.603]

[10] M.O. Aboelfotoh, C.L. Lin, J.M. Woodall [Appl. Phys. Lett. (USA) vol.65

(1994) p.3245]

[11] F. Ren, A.Y. Cho, D.L. Sivco, S.J. Pearton, C.R. Abernathy [Electron.

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p.3539]

[16] Y.Lu, T.S. Kalkur, C.A. Paz de Araujo[J. Electrochem. Soc. (USA) vol.136

(1989) p.3123]

202

Ohmic contacts

[17] I. Ishida, S. Wako, S. Ushio [Thin Solid Films (Switzerland) vol.39 (1976)

p.227]

[18] G. Stareev [Appl. Phys. Lett. (USA) vol.62 (1993) p.2801]

[19] E. Nebaur, M. Mai, J. Wurﬂ, W. Osterle [Semiconductor Science and

Technology vol.15 (2000) p.818]

[20] C.C. Han et al. [J. Appl. Phys. (USA) vol.68 (1990) p.5714]

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[Appl. Phys. Lett. (USA) vol.58 (1991) p.1617]

203

Chapter 7

Schottky contacts

Chapter scope p.205

Physics and characterisation of

Schottky contacts p.205

Physics of Schottky contacts p.205

Interfacial properties of Schottky

contacts p.210

Fabrication of Schottky

contacts p.214

Basic recessed gate fabrication p.214

Self-aligned Schottky gates p.217

Schottky gate structures p.219

Electrical characteristics of GaAs

Schottky contacts p.223

Reliability of GaAs Schottky

contacts p.225

Conclusion p.227

References p.227

7.1 CHAPTER SCOPE

Schottky contact is the term used to describe metal/semiconductor

interfaces that display rectifying or diode-like behaviour. The

material presented in this chapter will enable the reader to under-

stand the basic physics of Schottky contacts, methods of forming

them and ways that they form gate contacts to GaAs FETs.

The physics of Schottky contacts and their interfacial properties

are given in Section 7.2. Their formation and electrical testing

are discussed in Sections 7.3 and 7.4, respectively. Reliability is

discussed in Section 7.5.

7.2 PHYSICS AND CHARACTERISATION OF

SCHOTTKY CONTACTS

7.2.1 Physics of Schottky contacts

The physical description of a Schottky contact begins in a sim-

ilar way to the description of the metal/semiconductor interface

for ohmic contacts in Section 6.2. Ga or As atoms have tetra-

hedral symmetry in the GaAs semiconductor. Each Ga atom is

surrounded by four equivalent As atoms, i.e. equally spaced, equal

bond lengths, equal bond angle (109.5

◦

). Each As atom can be

described in the same way. At a free surface, the atoms lose their

four-fold bonding to other semiconductor atoms, which results

in unpaired electrons. The energy of these unpaired electrons is

higher than that for a fully formed bond. As a result, the overall

energy level can be reduced if the surface atoms rearrange them-

selves and form new bonds with each other (Section 3.3.1). At

an interface with a metal, similar atomic rearrangements happen,

but with new bonds with metal atoms also being possible. In

addition, defect structures such as missing bonds formed at the

interface contribute to the electronic states at the interface. Surface

or interface states are the two-dimensional analogue of the three-

dimensional band structure of crystalline semiconductors. Like

the band structure of a three-dimensional crystal, the electrons

205

Schottky contacts

of a single surface or interface bond are not considered localised

energy levels belonging to a particular bond, but they may be inﬂu-

enced by a two-dimensional periodic potential, if it exists. Energy

levels may also behave more as localised states if local disorder is

high. These new states have energy levels that mostly lie in the for-

bidden gap between the conduction and valence bands. When the

Fermi level is lined up between the semiconductor and the metal,

the states in the gap at the interface set the Fermi level near midgap,

while the n-type dopants set the Fermi level near the conduction

band in the bulk of the semiconductor. The bending of the conduc-

tion band at the metal/semiconductor interface sets the barrier to

current ﬂow across the interface, as illustrated in FIGURE 7.1. The

Schottky barrier is deﬁned as the energy difference between the

metal Fermi level and the semiconductor conduction band energy

at the metal/semiconductor interface.

FIGURE 7.1 Energy bands of a

semiconductor/metal interface.

For ohmic contacts the Schottky barrier is an undesirable imped-

iment to free current ﬂow, but it is a desirable barrier for Schottky

contacts to FETs. In Section 8.2.1 it will be seen that the FET acts

as a voltage-controlled current source and the Schottky gate is the

medium for the voltage input to the device. It is highly desirable

that Schottky contacts conduct no current and act only as a capacit-

ive input to the transistor. Although the Schottky contact does not

completely meet this ideal, it offers a reasonable approximation

over a certain voltage range. The current equations of a general-

ised metal/semiconductor interface were presented in Chapter 6

and are repeated below:

J = (const) exp(−qφ

/kT)[exp(qV/nkT) − 1]

J = J

[exp(qV/nkT) − 1]

(7.1)

where φ

is the barrier height, q is the electron charge, k is

Boltzmann’s constant, V is the applied voltage across the barrier

and n is the ideality factor. An ideal diode has n = 1, and n usually

ranges between 1 and 2 for Ga(Al)As-based Schottky contacts.

The ﬁrst term in the exponent dominates over the second for qV

a few times greater than kT and describes the forward conduction

of the Schottky diode. The second term in the exponent describes

the reverse leakage current.

Current conduction for moderately doped semiconductors

mostly occurs by the fraction of electrons that are sufﬁciently

energetic to traverse the Schottky barrier. This current mechan-

ism is termed thermionic emission and is well described by using

n = 1 in EQN (7.1). More highly-doped semiconductors begin to

add a tunnelling component to current conduction, as described in

Section 6.2.2, and do not make very good Schottky contacts. Even

206

Schottky contacts

with moderate to low-doped semiconductors, other current mech-

anisms, probably related to defects or interface states, exist and are

described by ideality factors that are usually greater than 1. These

other factors can be inﬂuenced by processing conditions also.

The interface states responsible for the conduction band bending

in FIGURE 7.1 deplete the carriers in the near surface region of

the semiconductor. This depletion region is also affected by the

applied voltage,

w =[2ε(V

− V

)/qN]

1/2

(7.2)

where ε is the dielectric constant, q is the electron charge, N is

the doping density, V

is the built-in voltage of the Schottky con-

tact and V

is the applied voltage of the Schottky contact. The

built-in voltage represents the depletion region that exists with no

externally-applied voltage. Positive applied voltage will reduce the

depletion region, while negative applied voltage will increase it.

EQN (7.2) is derived by solving the Poisson equation for a constant

doping and is useful for estimating depletion widths for certain

structures. Analytical modelling tools are a more general way of

analysing more complex structures. Other assumptions used in

deriving EQN (7.2) break down when (V

− V

) approaches zero

and when the electric ﬁeld represented by (V

−V

)/w approaches

the breakdown ﬁeld for GaAs. These limits also represent the

useful operating range of Schottky diodes.

The capacitance (C) of a Schottky diode is another useful

characteristic. Its equation is given by the relation

C = A(qεN/2V)

1/2

(7.3)

1/C

= 2V/qεNA

where A is the area of the metal/semiconductor interface and the

other terms are as before. No assumptions of constant doping were

used to derive EQN (7.3).

The second form of EQN (7.3) is particularly useful since C

is easily measured, can be manipulated to the form of EQN (7.3)

and is used to extract the doping as a function of voltage. The

doping and voltage can then be used with EQN (7.3) to extract the

doping as a function of depletion depth. This method is illustrated

in FIGURE 7.2, where C is measured as a function of voltage

(FIGURE 7.2(a)), then 1/C

is plotted as a function of voltage

(FIGURE 7.2(b)). The slope of this plot yields the doping concen-

tration as a function of voltage, which is plotted as N versus depth

in FIGURE 7.2(c).

207

Schottky contacts

–6 –5 –4 –3 –2 –1 0

100

110

120

130

140

capacitance (pF)

bias voltage (V)

(a)

60 65 70 75 80 85 90 95

net doping concentration N

–N

(cm

–3

)

–6 –5 –4 –3 –2 –1 0

1 × 10

2 × 10

3 × 10

4 × 10

5 × 10

6 × 10

7 × 10

8 × 10

(cm

)

(c)

(b)

distance from junction (nm)

bias voltage (V)

FIGURE 7.2 Capacitance-voltage and doping-depth plots.

Direct capacitance measurements require fairly large areas for

the Schottky contacts, of the order of 10

μm

(depending on the

carrier concentration), in order to measure capacitances in the

tens to hundreds of picofarads. This area represents contacts with

2–3 orders of magnitude larger areas than typical Schottky gates

for FETs so testing is carried out on special test structures (large

diodes) created during FET fabrication or with techniques such as

mercury probes (see Section 2.5.4). Special techniques (based on

S-parameter measurements – see Section 8.2.1) are used to extract

the much smaller capacitances of individual gate ﬁngers, and these

techniques are not normally used to determine the doping in FETs.

Other examples of Schottky contact characterisation will be

brieﬂy discussed. Current-voltage (I-V) plots can be taken for

Schottky diodes of all different sizes, including the gates in actual

FETs. When EQN (7.1) is expressed in logarithmic form, the

result is

ln(J) = ln(J

) + qV/nkT (7.4)

208

Schottky contacts

ln (J )

region (a)

region (b)

region (c)

n ~ 2

(measured)

region (d)

ideal diode (n ~ 1)

slope=

n ~ 2

V ~ IR + Vj

nkT

FIGURE 7.3 Ln(J) versus V plot for an idealised Schottky contact.

where J

can be given by

= A

∗∗

exp(−qφ

/kT) (7.5)

and A

∗∗

is a constant (the Richardson constant), φ

is the barrier

height and the other terms were previously deﬁned. A plot of ln(J)

versus voltage gives some useful information about a Schottky

contact. FIGURE 7.3 shows an idealised plot for a Schottky con-

tact. Four distinctive regions of this plot stand out. Region (a) is

for the ﬁrst several multiples of kT (0–100 mV). In this region,

the assumptions behind EQN (7.4) are not yet valid and no log-

linear relation exists yet. Generation-recombination current may

dominate in some cases. In region (b), ln(J) versus V is linear

over a range of voltages spanning many decades of current. In this

region, the slope of the curve equals q/nkT and the ideality factor

n can be extracted from the slope of the plot evaluated according

to EQN (7.4). High-quality Schottky diodes often have ideality

factors near 1. In regions (c) and (d), the diode begins to turn on and

the current is high enough that the resistive effects of GaAs conduc-

tion become important. Analysis of the ideality factor is important

in determining the quality of a Schottky contact. Examples of

this analysis will be given in sections with topics varying from

metallurgy of Schottky contacts (Section 7.2.2), recessed gates of

FETs (Section 7.3.1) and refractory gates for FETs (Section 7.3.2).

In addition, analysis of pn junction ideality factors (Section 9.2.1)

proceeds in a similar way.

209

Schottky contacts

EQNS (7.4) and (7.5) may also be analysed to extract φ

. The

Schottky barrier height is important in GaAs FETs because it dir-

ectly affects the zero bias depletion width and variability in its

value can, therefore, cause variability in FET currents (refer to

Section 8.2). From FIGURE 7.3 and EQN (7.4), the intercept gives

ln(J

). From EQN (7.5), the Schottky barrier height can be extrac-

ted as long as A

∗∗

is known. For GaAs, the commonly accepted

value for A

∗∗

is 8.6 (compared with a free electron value of 120).

Because of the exponential relationship between φ

and A

∗∗

, relat-

ively large errors in A

∗∗

will result in only small uncertainties in φ

Schottky barrier extraction techniques other than the I-V

method are sometimes used as well. These techniques include

the capacitance-voltage or the activation energy methods. The

reader is referred to references [1–3] to delve further into these

methods.

7.2.2 Interfacial properties of Schottky contacts

Free surfaces are very reactive, as explained in Section 3.3.1.

Although many attempts have been made to study the pristine

GaAs surface and the way it forms an intrinsic Schottky barrier

with a wide host of metals, it is safe to say that the funda-

mental mechanisms are poorly understood, at least in comparison

to ohmic contacts. What is understood is that defects are eas-

ily created in the Schottky barrier formation. Theories describing

the role of defects in Schottky barrier formation are summarised

in Section 3.3.1.1. In one very telling experiment repeated in a

number of different laboratories, researchers took a clean GaAs

surface in ultra-high vacuum, cooled the sample, coated it with a

solidiﬁed noble gas such as Ar and then deposited a metal, which

physisorbed on the Ar. When the sample was slightly warmed,

the Ar vaporised and the thin metal ﬁlm contacted the GaAs sur-

face without having the energy of bombardment. Insight about

the intrinsic low-temperature properties of Schottky contacts was

gained. Midgap states were present even under those benign con-

ditions. Most known Schottky metals will interact with the GaAs

surface and create midgap defect states at fairly low temperatures.

These interfacial interactions are consistent with the physical pic-

ture of surfaces and interfaces presented in Section 7.2.1. Though

a wide variety of metals have been studied, most have remark-

ably similar Schottky barriers that vary within only about 0.2 eV

(Section 7.4). This situation contrasts greatly with Si Schottky bar-

riers, where the work function of the gate metal affects the Fermi

level in the semiconductor to a greater extent than for GaAs.

Some considerations in the choice of Schottky metals include

the metal adhesion, resistivity, metal reactivity and long-term

210

Schottky contacts

reliability. No single metal meets all of these diverse requirements

and so stacks of layered metals are often used. Al perhaps comes

the closest; it has low resistivity, reasonable adhesion and reason-

able stability. One of its drawbacksis its propensityto react with Au

(which could be a bond pad overlay or interconnect metal) under

high current density to form a high-resistivity phase known collo-

quially as “purple plague”. This process, which occurs gradually

under current densities reasonably expected in normal operation

of GaAs circuits, is a reliability concern. Certainly, preventive

measures in the form of diffusion barriers are possible for purple

plague, so Al can be a perfectly suitable Schottky metal and is

one commonly used contact.

High metal resistivity in micro-circuits will cause undesired IR

voltage drops. In the gates of FETs, high resistivity will also

degrade high-frequency performance. For low-resistivity gates,

four metal choices exist: Au, Al, Cu and Ag. The latter two metals

are rarely used for GaAs Schottky contacts due to their reactiv-

ity, though in the case of Cu, it is not clear that suitable diffusion

barriers would not prevent this.

One important interfacial property of the Schottky metal is its

adhesion. Cr and Ti have particularly good adhesion to GaAs. So

does Al. These metals, along with the refractory metals such as

WSi, are common choices for Schottky contacts. Au has poor

adhesion to GaAs. It is also excluded for the GaAs/metal interface

due to its reactivity with GaAs, as will be elaborated on in some

of the material that follows.

Most metals will react to some extent with GaAs at sufﬁciently

high temperatures. The key is to match the temperature require-

ments of the device processing (or its application, if that is higher)

with the thermal constraints of the GaAs/metal interface. We will

review the interfacial reactions for a number of commonly used

contacts.

Among the layered metal stacks, TiPtAu is one of the most

widely used for low-temperature processes (gate after ohmic

metal; see Chapter 8). Its use and the rationale for its use are

often the source of some misunderstanding, so we will review

them here. We will begin by describing the simpler GaAs/Pt,

GaAs/Ti and GaAs/Au interfacial reactions before describing the

GaAs/Ti/Pt/Au reactions.

A GaAs/Pt contact reacts in tens of minutes at temperatures

near 300

◦

C, but will show relatively stable Schottky character-

istics up to 500

◦

C for short annealing times [4,5]. The interface

of GaAs/Pt forms Pt-arsenide complexes, principally PtAs

, while

the Ga diffuses through this boundary layer into the Pt. The reaction

proceeds with a t

1/2

dependence at temperatures between 300 and

400

◦

C, indicating that the Ga diffusion is the rate limiting step.

211