Baca A.G., Ashby C.I.H. Fabrication of GaAs Devices

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Dry etching of GaAs and related alloys

TABLE 5.2 ECR-high-density-plasma etching (ECR-HDPE) rates for GaAs.

Etchant Rate T

∗

Pressure Flow μ-wave RF Self Ref. Comments

(μm/min) (

◦

C) (mTorr) (sccm) power power bias

(W) (W) (−V)

0.23 r.t. 2 10 50 0 [a] damage removal

4Cl

: 1Ar 0.9 r.t. 2 10 250 10 [b]

: 9Ar 0.037 0.5 25 70 80 [b] smooth, vertical

4.3BCl

: 1Cl

0.8–1.1 – 10–20 80 300 – 150 [c] 30 μm vias

BCl

0.080 – 1 30 200 – 150 [d] GaAs

∼

AlGaAs

2BCl

: 3Ar 0.5 20 1 25 500 – 50 [e] GaAs

∼

AlGaAs

BCl

0.4 25 1 30 850 150 250 [f]

3BCl

:1N

1.3 25 1 30 850 150 250 [f]

2BCl

: 1SF

0.071 – 1 30 200 – 150 [d] GaAs/AlGaAs >600/1

:3H

/Ar 0.008 1 27 250 0–60 50 [g] GaAs AlGaAs

InGaAs/GaAs 2 : 1

1CH

:5H

0.01 40–50 0.75 36 400 0 <5–10 [h]

: 10H

0.015 40–50 0.75 33 600 0 <5–10 [h]

∗

Nominal platen temperature; wafer surface probably hotter

[a] K.K. Ko, S.W. Pang [J. Electrochem. Soc. (USA) vol.141 (1994) p.255]

[b] S.W. Pang, K.K. Ko [J. Vac. Sci. Technol. B (USA) vol.10 (1992) p.2703]

[c] S.J. Pearton, F. Ren, A. Katz, J.R. Lothian, T.R. Fullowan, B. Tseng [J. Vac. Sci. Technol. B (USA) vol.11 (1993) p.152]

[d] S.J. Pearton, W.S. Hobson, C.R. Abernathy, F. Ren, T.R. Fullowan, B. Tseng [Plasma Chem. Plasma Process. (USA) vol.13 (1993)

p.311]

[e] S.J. Pearton, C.R. Abernathy, R.F. Kopf, F. Ren [J. Electrochem. Soc. (USA) vol.141 (1994) p.2250]

[f] R.J. Shul, G.B. McClellan, R.D. Briggs, D.J. Rieger, S.J. Pearton, C.R. Abernathy, J.W. Lee, C. Constantine, C. Barratt [J. Vac. Sci.

Technol. A (USA) vol.15 (1997) p.633]

[g] C. Constantine, D. Johnson, S.J. Pearton, U.K. Chakrabarti, A.B. Emerson, W.S. Hobson, A.P. Kinsella [J. Vac. Sci. Technol. B (USA)

vol.8 (1990) p.596]

[h] V.J. Law, M. Tewordt, S.G. Ingram, G.A.C. Jones [J. Vac. Sci. Technol. B (USA) vol.9 (1991) p.1449]

TABLE 5.3 ICP-high-density-plasma etching (ICP-HDPE) rates for GaAs.

Etchant Rate T

∗

Pressure Flow ICP RF Self Ref. Comments

(μm/ (

◦

C) (mTorr) (sccm) power power bias

min) (W) (W) (−V)

: Ar 1.2 25 1 30 500 150 250 [a]

3Cl

: 1Ar 1.6 25 1 30 500 150 250 [a]

0.7 25 1 30 500 150 250 [a]

3Cl

:1N

1.1 25 1 30 500 150 250 [a]

BCl

0.30 10 2.5 40 500 100 250 # smooth

BCl

0.10 10 2.5 40 160 130 150 #

BCl

0.4 25 1 30 500 150 250 [a]

3BCl

:1N

0.95 25 1 30 500 150 250 [a]

∗

Nominal platen temperature; wafer surface probably hotter

# Author’s data

[a] R.J. Shul, G.B. McClellan, R.D. Briggs, D.J. Rieger, S.J. Pearton, C.R. Abernathy, J.W. Lee,

C. Constantine, C. Barratt [J. Vac. Sci. Technol. A (USA) vol.15 (1997) p.633]

80 are attained in the conventional RIE mode. With the addition

of 200 W ICP power to switch the reactor mode to HDPE, the

selectivity of GaAs versus AlGaAs is reduced to 45 and versus

162

Dry etching of GaAs and related alloys

InGaP to about 8. Increasing ion ﬂux by increasing ICP source

power decreases selectivitywhile increasing ion energyby increas-

ing RF power also decreases selectivity. Both effects are due to

the better sputtering of AlF

or InF

with higher ion energies and

ﬂuxes.

Hydrogen atoms in HDPE produce the same desirable and dele-

terious effects observed in RIE. However, the use of much lower

incident ion energies makes hydrogen diffusion more import-

ant than H implantation effects in HDPE. Consequently, any

H-related problems can be more easily rectiﬁed with HDPE

etching.

Photoresist erosion rates tend to be higher in HDPE than RIE

due to the higher fraction of radicals in the HDPE plasmas that

increase the chemical contribution to resist removal. This loss of

selectivity for GaAs versus resist must be considered when trans-

lating a process from RIE to HDPE. Selectivity versus photoresist

in HDPE is generally less than 10 and often of the order of 2–4.

In contrast, selectivity versus resist greater than 10 is generally

possible with RIE.

5.9 REACTIVE-ION-BEAM ETCHING (RIBE) AND

CHEMICALLY ASSISTED ION-BEAM

ETCHING (CAIBE)

Reactive-ion-beam etching (RIBE) and chemically assisted ion-

beam etching (CAIBE) combine a collimated ion beam with a

chemically reactive gas to provide highly anisotropic etching.

Unlike RIE and HDPE, the ions in RIBE and CAIBE are generated

in an ion source rather than in a plasma that is in direct contact with

the sample (FIGURE 5.12). Use of a remote ion source provides

RIBE

gas

inlet

gas

inlet

beam voltage beam voltage

13.56

MHz

13.56

MHz

ion

extraction

grids

Cl plasmaCl plasmaCl plasma

ion

extraction

grids

Ar plasma

CAIBE

Ar plasmaAr plasma

FIGURE 5.12 RIBE and CAIBE reactors.

163

Dry etching of GaAs and related alloys

TABLE 5.4 Reactive-ion-beam etching (RIBE) rates for GaAs.

Etchant Normalised rate Pressure Ion Current Beam angle Ref. Comments

(micron/min/ (mTorr) energy density off normal

(1 mA/cm

)) (eV) (mA/cm

) (

◦

)

0.6 0.25 550 0.5 0 [a]

8.9 1 200 0.09 0 [b] 473 K

2.2 1 200 0.09 0 [b] 373 K

0.067 0.2 200 0.05 30 [c] no loss of As

0.405 0.3 500 0.21 30 [c] no loss of As

CCl

0.06 0.23 500 0.4 0 [d]

BCl

0.12

∗

1.5 600 – 0 [e] p damaged

more than n

2% O

/Ar 0.02 0.14 100 0.15 0 [f]

∗

Rate not current-normalised

[a] K. Asakawa, S. Sugasa [Jpn. J. Appl. Phys. 2 (Japan) vol.22 (1983) p.L653–5]

[b] T. Tadokoro, F. Koyama, K. Iga [J. Vac. Sci. Technol. B (USA) vol.7 (1989) p.1111–4]

[c] R.A. Barker, T.M. Mayer, R.H. Burton [Appl. Phys. Lett. (USA) vol.40 (1982) p.583–6]

[d] W.-X. Chen, L.M. Walpita, C.C. Sun, W.S.C. Chang [J. Vac. Sci. Technol. B (USA) vol.4 (1986) p.701–5]

[e] K. Nagata, O. Nakajima, T. Ishibashi [Jpn. J. Appl. Phys. (Japan) vol.25 (1986) p.L510–12]

[f] H. Kinoshita, T. Ishida, K. Kaminishi [Appl. Phys. Lett. (USA) vol.49 (1986) p.204–6]

independent control of ion energy and of the ﬂux of ions and neut-

rals at the wafer. It also reduces the spread in ion energies to a few

eV compared with spreads of up to several hundred eV in RIE.

RIBE involves the generation of reactive chemical species, such

as Cl

and Cl

, in an ion source using gases such as Cl

and BCl

A beam of these ions is used to etch GaAs. CAIBE, also called ion-

beam-assisted etching (IBAE), uses a beam of inert ions, such as

,Xe

or Ga

, that is directed at the wafer, which is immersed

in a neutral gas, such as Cl

. A variation called radical-beam-ion-

beam etching (RBIBE) predissociates the Cl

to provide a beam

of highly reactive Cl atoms that strikes the wafer in concert with

an ion beam. Focused-ion-beam (FIB) etching is another variant

in which the collimated ion beam from a broad-area ion gun is

replaced by a scanned, tightly focused beam that can be used for

direct-write etching.

Etch rates (TABLES 5.4–5.6) with these processes are inter-

mediate between those of simple physical sputtering and plasma

etching in RIE systems. Higher rates occur when parameters are

selected to increase the importance of chemical etching versus ion

sputtering. Damage is also reduced when chemical contributions

increase, but undercutting may become a problem. Increasing the

fraction of total ion energy that is deposited very near the surface

increases rates, and etching with Ar

produces etch rates an order

of magnitude faster than with He

at the same incident energy.

While it is customary to normalise etch rates to ﬂuxes of 1 mA/cm

164

Dry etching of GaAs and related alloys

TABLE 5.5 Chemically-assisted-ion-beam etching (CAIBE) rates for GaAs.

Etchant Rate Pressure Ion Current Angle off Ref. Comments

(μm/min/ (mTorr) energy density normal

(1 mA/cm

)) (eV) (mA/cm

) (

◦

)

Broad area

+ Ar

5 10 1000 1 0 [a] ±5% uniformity

0.085 10 500 0.02 0 [a]

5 0.08 500 0.25 0 [b] heating effects

3 0.08 500 0.02 0 [b]

1.32 0.25 200 0.025 – [c]

0.50 0.25 200 0.100 – [c]

1.36 0.25 400 0.025 – [c]

0.65 0.25 400 0.100 – [c]

Focused ion beam (FIB) (keV)

+ Ga

1.4 20 35 80 0 [d]

3.6 20 35 80 70 [d]

[a] G.A. Lincoln, M.W. Geis, S. Pang, N.N. Efremow [J. Vac. Sci. Technol. B (USA) vol.l (1983) p.1043–6]

[b] M.W. Geis, G.A. Lincoln, N. Efremow, W.J. Piacentini [J. Vac. Sci. Technol. (USA) vol.19 (1981) p.1390–3]

[c] J.A. Skidmore, D.L. Green, D. Young, J.A. Olsen, E.L. Hu, L.A. Coldren, P.M. Petroff [J. Vac. Sci. Technol. B

(USA) vol.9 (1991) p.3516–20]

[d] Y. Ochiai, K. Gamo, S. Namba [J. Vac. Sci. Technol. B (USA) vol.3 (1985) p.67–70]

TABLE 5.6 Radical-beam-ion-beam etching (RBIBE) rates for GaAs.

Etchant Rate Flow Pressure Ion Current Angle off Ref. Comments

(μm/min/ (sccm) (mTorr) energy density normal

(1 mA/cm

)) (eV) (mA/cm

) (

◦

)

+ Ar

2.8 9 0.8 200 0.2 10 [a] straight, smooth

facets

6.4 5 0.25 200 0.025 – [b] low damage, 30

◦

1.9 5 0.25 200 0.100 – [b] equirate versus

0.6

0.4

8.0 5 0.25 400 0.025 – [b]

1.6 5 0.25 400 0.100 – [b]

[a] J.A. Skidmore, L.A. Coldren, E.L. Hu, J.L. Merz, K. Asakawa [J. Vac. Sci. Technol. B (USA) vol.6 (1988) p.1885–8]

[b] J.A. Skidmore, D.L. Green, D. Young, J.A. Olsen, E.L. Hu, L.A. Coldren, P.M. Petroff [J. Vac. Sci. Technol. B (USA) vol.9

(1991) p.3516–20]

actual rates may be much higher or lowerthan expected if etching is

done at different ion ﬂuxes. At high ion ﬂuxes, appreciable heating

may occur and thermally activated chemical reactions can yield

much higher etch rates than with lowﬂux conditions. Beam-current

heating effects can occur with ﬂuxes as low as 0.25 mA/cm

. Etch

rate dependence on extraction voltage, V, varies from V

5/2

under

predominantly sputtering conditions to a sublinear dependence on

V when chemical contributions are more important.

165

Dry etching of GaAs and related alloys

Rates in CAIBE and RBIBE depend on the uniformity of

Cl-species across the wafer. Neutral ﬂuxes can vary by up to an

order of magnitude across a wafer if gas inputs are not optim-

ally designed. Gas nozzle conﬁguration, including angle and

separation from the wafer, is critical for good wafer uniform-

ity. Etch proﬁles can be especially sensitive to nozzle angle,

with angled surfaces forming at temperatures below 100

◦

Cas

features deepen and regions are shadowed from simultaneous

reactive gas and ion ﬂux. Reactive gas scattering from vertical

walls can also produce trenching during “room temperature”

etching.

Etch proﬁles for all ion-beam-based processes depend strongly

on ion incidence angles and beam divergence. Normal incidence

can produce angled sidewalls (overcutting) when sputtering is the

dominant mechanism, but increasing the incidence angle slightly

can produce vertical walls. Slightly tilting and rotating the sample

can also increase verticality. Very small structures (9 nm quantum

wires) have been etched using angled CAIBE following vertical

etching of 80 nm quantum wires.

Beam divergence is more pronounced at lower ion energies.

Some beam spread due to scattering from neutrals can occur for ion

energies below 500 eV. However, high ion energies will produce

electronic damage near the wafer surface. Damage of sidewalls is

minimised by improved beam collimation. With well collimated

beams, RIBE and CAIBE are extremely well suited for etching

devices where sidewall damage must be minimised, assuming the

greater damage on the horizontal etched surfaces can be tolerated.

Sidewall etching by reﬂected primary ions or energetic second-

ary ion species can produce undercutting and damage. Trenching

can result at feature edges when ions from poorly collimated

beams are deﬂected from sidewalls. Wafer heating at high ion

ﬂuxes can increase undercutting due to thermally activated chem-

ical processes even when the beam is well collimated. However,

slight undercutting may be very desirable to remove damage from

sidewalls in some applications.

For CAIBE, highest rates occur when an optimum balance is

achieved between Cl

reaction with the surface to form a Cl layer

and the ion-induced desorption of the products. Very smooth sur-

faces are possible, but greater initial surface cleanliness is required

than with conventional RIE. Solvent cleaning just before loading

wafers yields the smoothest surfaces.

Surface damage in CAIBE depends on the degree of chemical

contributions to etching. While CAIBE with a Cl

ﬂux

>1 × 10

/cm

s with 500 eV Ar

produced diodes with ideality

factors (n) equal to the control, an order of magnitude lower Cl

ﬂux a few mm away on the same wafer yielded signiﬁcant increases

166

Dry etching of GaAs and related alloys

in n. Increasing the substrate temperature decreases the post-etch

damage.

Surface stoichiometry depends on the balance between sput-

tering and chemical reaction through the Ar

/Cl

ratio. Surface

enrichment in As is greater under higher Cl

ﬂux but decreases at

higher beam energies.

5.10 GENERAL ISSUES FOR DRY ETCHING

5.10.1 Etch uniformity

To ﬁrst order, uniformity is determined by the hardware design

and quality. Most properly operating etch systems are capable of

producing a uniform ﬂux of reactants across the platen holding the

wafer. However, if etch rates seem to vary in a reproducible way

depending on how the wafer is located in the etch chamber, the

hardware may not be performing up to speciﬁcation and may need

repair.

In ECR-HDPE systems, proper setting of the lower magnet,

which primarily controls beam divergence, is important. The most

uniform supply of reactants will be obtained when the lower

magnet is set to produce a well collimated beam.

Even when the hardware is working ideally, the consumption

of reagents will be different on the platen and the wafer. This

can lead to either a greater supply and consequently faster rate

near the wafer edge if the platen doesn’t consume reactants or a

lower supply and lower rates if it does. These types of etch non-

uniformities are generally referred to as loading effects. If very

high uniformity across the entire wafer is needed or if small pieces

of a wafer are being individually processed, it may help to place

sacriﬁcial bulk GaAs wafers in contact with the device wafer to

equalise reactant consumption rates.

A more local variant of loading effects is found when there

is considerable variation in the size and spacing of devices on

the wafer. Regions with a high resist-to-GaAs ratio (low exposed

fraction of GaAs) may etch at different rates than those with low

resist-to-GaAs ratios (high exposed fraction of GaAs). If fewer

reactants are consumed etching resists, diffusion of reactants

from resist regions into GaAs regions can locally increase the rate.

Etch uniformity may also depend on proper surface precondi-

tioning before beginning to etch. Surfacecleaning issues have been

discussed in detail in Section 3.2. Without proper precleaning,

some regions of the surface may be “micromasked” by surface

chemical species that delay initiation of the etch at that location

and thereby produce roughening.

167

Dry etching of GaAs and related alloys

Non-uniform oxides on Al- and Sb-containing materials pose

the most risk for causing micromasking. This is especially true if

the structure of the device involves more than one etch procedure,

as in the case of a double-mesa like that shown in FIGURE 5.14.

Differing thicknesses of oxide can form on exposed Al- and

Sb-containing layers, leading to roughening during the second etch

step. This can be prevented by a brief H-plasma treatment after

returning the wafer to the plasma chamber but before beginning

the second etch. Details of an effective pretreatment that yielded

subnanometre RMS roughness for GaInAsSb and nanometre-scale

roughness for AlGaAsSb have been reported [3]. The slightly

greater roughness in the second case reﬂects the effect of Al

versus Ga.

5.10.2 Damage from dry etching

While dry etching is to be preferred over wet etching for its better

dimensional control, greater anisotropy, and generally more repro-

ducible etch rates, the ion bombardment so essential to achieve

these advantages simultaneously damages the near-surface region

of the wafer. Therefore, in selecting etch conditions, the amount of

damage that can be safely tolerated without excessively degrading

electronic properties of the material must be carefully considered.

Degradation of electronic properties can result from two main

mechanisms. The ﬁrst is lattice damage resulting from direct

energy transfer from the incident ion or energetic neutral. Disrup-

tion of the lattice can lead to the formation of point defects such

as antisites (As

,Ga

) and vacancies (V

). Ions can also

produce changes in the surface stoichiometry, which can intro-

duce surface states and change the Fermi level pinning position

and even the near-surface doping type, as discussed in Chapter 3.

The second is dopant passivation due to reaction of dopant atoms,

especially Si, with hydrogen atoms generated in the plasma. Both

problems can be reduced, although not necessarily eliminated, by

post-etch thermal annealing.

Although damage will occur at any ion energy above the

≈40 eV atomic displacement threshold of GaAs, the damage pro-

duced at ion energies less than 100 eV is generally acceptable

for most applications. Energies in excess of 100 eV are routinely

encountered in RIE, RIBE and CAIBE, although HDPE pro-

cesses readily permit low-energy bombardment for anisotropic

proﬁles. Point-defect creation in the near surface can lead to

carrier compensation up to 0.22 μm deep at 100-V bias. With

bias voltages less than 50 V, undegraded optical properties and

Schottky diode behaviour can be achieved. However, as ion ener-

gies are lowered below 100 eV to reduce damage, the increased

168

Dry etching of GaAs and related alloys

chemical component of the etch can lead to excessive undercutting

and loss of vertical proﬁles. While GaAs MESFETS etched with

SiCl

between 100 and 300 eV have been described as “damage

free”, a 200% overetch using SiCl

/SF

and an AlGaAs etch-stop

layer decreased the source saturation current due to active layer

depletion. More damage-sensitive HEMT devices, which operate

at lower bias voltages, are completely damaged with a DC bias

of 200 V and a 200% overetch. At voltages over 200 eV, deep-

level electron traps form, but most of these can be annealed out.

Ion energies over 300 eV may produce permanent degradation of

electrical properties. While annealing reduces the total defects,

it can also cause propagation of the remaining defects to greater

depths.

Strategies to reduce ion damage can improve device perform-

ance. Conﬁning the damaged region as close to the surface as

possible is advantageous. Damage can be reduced by minimising

the ion penetration depth by reducing ion energy or using heavier

ions, which reduces the ion penetration at a given energy. Increas-

ing the chemical contribution and consequently increasing the etch

rate can help. Higher etch rates leave less apparent damage that

tends toward a steady-state value for etch times greater than the

damage depth/etch rate ratio. The best strategy may be removal

of the damaged region at the end of the etch. A brief etch under

conditions with low ion energies (<40 eV) can etch away the thin

damaged region, leaving only high-quality material. This approach

is easy to implement in an HDPE system by reducing the RF bias

immediately before quenching the high-density plasma; it is difﬁ-

cult to do in conventional RIE systems where the plasma and bias

are generated by the same RF power supply.

For very small etched devices where the sidewall area is an

important characteristic of the device, ion-induced damage of the

sidewall may be important. Even though top-surface and sidewall

ion ﬂuxes may be similar, the energy of ions striking the side-

wall is generally lower with the impinging material consisting

mainly of reﬂected primary ions, sputtered material and chemical

reaction products from the adjacent ﬂat surface. Sidewall dam-

age can be minimised by low ion energy, highly collimated ion

beams (which is more difﬁcult at low ion energy) and a signiﬁc-

ant chemical contribution to the etch mechanism that will etch the

sidewall enough to remove the damage but not enough to cause

excessive undercutting. Unlike top-surface damage, which tends

towards a steady-state value determined by the balance between

ion penetration and removal of the damaged layer by etching,

sidewall damage continues to increase with total etch time.

Changes in surface stoichiometry due to differential removal of

As- and Ga-containing reaction products can change the location

169

Dry etching of GaAs and related alloys

of the Fermi level pinning at the surface. While many studies

report that n-type and p-type pin at the same midgap energy for

GaAs(100), others report pinning of p-type material closer to the

valence band. Dry etching produces an As-rich surface and As at

the interface with the native oxide that forms after etching shifts

the p-type pinning position closer to midgap. The implications for

forming high-quality ohmic and Schottky contacts are clear.

Plasmas with H-containing source gases expose the wafer to a

ﬂux of H-atoms that readily diffuse into the wafer and passivate

dopants. The depth of dopant passivation will depend on the diffu-

sion characteristics of H in the material or combination of materials

in a heterostructure. Deeper penetration can result from higher ion

energies, higher wafer temperatures during etching (due to heat-

ing by ion bombardment), larger H-atom fractions in the plasma,

longer exposure at longer etch times and the competition between

diffusion rates and the rate of removal of the surface.

Thermal annealing can release the H and reactivate the dopants.

The effectiveness of annealing depends on the material. While

GaAs reactivates quite readily with a 5 min anneal at 360

◦

AlGaAs materials may be more difﬁcult to reactivate, espe-

cially for higher Al mole fractions. While the sheet resistance in

0.15

0.85

As is restored with a 30 min anneal at 450

◦

C, the same

annealing conditions increase the sheet resistance in Al

0.3

0.7

As.

The depth of carrier reduction increases from 170 nm in the unan-

nealed material to 300 nm in the annealed material. This may be

related to the DX centre, which becomes important for Al mole

fractions in excess of 0.22.

5.10.3 Resists and their behaviour in dry etching processes

Device fabrication is not possible without the use of a resist

to deﬁne the pattern by protecting certain regions from etching

while permitting etching in other regions. Many general photores-

ist issues have been discussed in Section 4.4.1. This section

will be more speciﬁcally addressed to resist issues important in

dry etching. Resists can be divided into two general categories:

1) conventional photoresists (PR) based on organic polymers and

2) metallic and dielectric resists. While ideally one would want

the resist to be unaffected by the GaAs etch process, in reality the

resist will be at best physically sputtered and at worst chemically

etched as well, sometimes at rates faster than the etch rate of GaAs.

It is, therefore, very important to understand how a particular dry

etch process is going to affect the resist and to select the resist type

and thickness so it will not fail during device fabrication. A most

important point to remember is that the smoothness (or roughness)

of the resist before etching will determine the smoothness of the

170

Dry etching of GaAs and related alloys

ﬁnal feature wall. While this may not be of paramount import-

ance for many electronic devices, for optoelectronic devices any

edge roughness may lead to unacceptable light scattering at the

roughened surface. It is always desirable to have as smooth a resist

edge as possible.

The effect of ion bombardment of the resist must ﬁrst be con-

sidered in selecting both the resist type and the thickness for a

particular application. Even if the resist is not readily attacked

by the chemistry employed to etch GaAs, it will be sputtered by

the impinging ions. This can limit the critical dimension (smallest

feature size) that can be achieved for a given required etch depth.

Since thinner photoresists are required for smaller feature sizes,

resist erosion places an upper limit on the achievable etch depth in

the ﬁnal device. Organic PRs sputter quite readily and can be rather

quickly removed by high-energy ions, such as those used in RIBE

processes. Metallic and dielectric resists are frequently required if

appreciable etch depths are required. However, the ease of using

standard photoresist makes it the most attractive ﬁrst choice for

many applications.

A matter of some concern with organic photoresists is the reac-

tion of their exposed sidewalls with halogens like Cl to form

partially halogenated compounds that have very different solubil-

ities from the unaltered resist. This can make the altered sidewalls

less soluble in acetone than the original photoresist and impede

removal of all the resist after etching. This shows up as “fences”

of altered photoresist along the upper edges of etched mesas.

Removal may require a more aggressive solvent, such as NMP

(N-methyl pyrolidone) and ethanolamine, and/or oxygen plasma

cleaning.

The resist will also be heated during the process. The simplest

effect of heating is an increase in the resist erosion rate. While

RIE etching using BCl

/Cl

appeared to produce only slightly

faster erosion of a Novolac resist than an SiO

or Si

resist

below 100

◦

C, the Novolac photoresist etched up to two orders

of magnitude faster when substrate temperatures near 140

◦

were used. This contrast was most extreme at high RF powers,

where additional heating of the wafer due to high ion energies

occurs.

If photoresist (PR) is heated excessively, it can reticulate.

Reticulation is the wrinkling of the resist that can occur when the

surface has not been cured enough to withstand the volume change

of the bulk of the resist as it becomes more dense and contracts as

the temperature increases. Careful attention to pre-etch PR curing

protocols can minimise this problem.

Photoresist can also ﬂow if it is heated above its glass-

transition temperature, T

, which is between 100 and 125

◦

171