Alciatore D.G., Histand M.B. Introduction to Mechatronics and Measurement Systems

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Figure 6.26 DM74LS00 NAND gate IC data sheet.

(Courtesy of National Semiconductor, Santa Clara, CA)

6.11 TTL and CMOS Integrated Circuits 231

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Figure 6.27 CMOS 4011B NAND gate internal design.

(Courtesy of Texas Instruments, Dallas, TX)

3 (10, 4, 11)

(30, 4, 11)

LOGIC DIAGRAM

ALL INPUTS ARE PROTECTED

BY CMOS PROTECTION

NETWORK

1 OF 4 GATES (NUMBERS

IN PARENTHESES ARE

TERMINAL NUMBERS

FOR OTHER GATES)

1 (8, 8, 11)

2 (8, 3, 12)

2* (9, 9, 13)

1* (8, 8, 13)

232 CHAPTER 6 Digital Circuits

■ CLASS DISCUSSION ITEM 6.12

Driving an LED

There are three different ways to drive an LED with a TTL digital device, depend-

ing on whether the output type is totem pole or open collector and whether or not

the device sinks or sources current through the LED. Sketch the three possible out-

put circuits. Which of these three circuits exhibits positive logic (i.e., when the

output of the device is HI, the LED is ON and when the output is LOW, the LED is

OFF)? For each of the three circuits, indicate whether it is sourcing or sinking cur-

rent. In which circuit would you expect the LED to be the brightest? Why?

6.11.3 Interfacing TTL and CMOS Devices

There may be situations where we need to connect devices from the same and/or

different families. We consider connecting a TTL device to other TTL and CMOS

devices and connecting a CMOS device to other CMOS and TTL devices. When

designing digital systems, we recommend using only one family of devices (TTL or

CMOS), but sometimes you may be required to interface between families.

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Figure 6.28 CMOS 4011B NAND gate IC data sheet. (Courtesy of Texas Instruments, Dallas, TX)

CHARACTER-

ISTIC

UNITS

STATIC ELECTRICAL CHARACTERISTICS

Quiescent Device

Current,

Max.

Output Low

(Sink) Current

Min.

Output Voltage:

Low-Level,

Max.

Output Voltage:

High-Level,

Min.

Input Low

Voltage,

Max.

Input High

Voltage,

Min.

Input Current

Max.

Output High

(Source)

Current,

Min.

CONDITIONS

(V)

–

0.4

0.5

1.5

4.6

2.5

9.5

13.5

–

4.5

13.5

0.5, 4.5

1.9

1.5, 13.5

(V)

0.5

0.10

0.15

0.20

0.5

0.10

0.15

0.5

0.10

0.15

0.5

0.10

0.15

0.5

0.10

0.15

–

0.18

(V)

⫺55

0.25

0.5

0.64

1.6

4.2

⫺0.64

⫺2

⫺1.6

⫺4.2

⫺40

0.25

0.5

0.61

1.5

⫺0.61

⫺1.8

⫺1.5

⫺4

⫹85

7.5

150

0.42

1.1

2.8

⫺0.42

⫺1.3

⫺1.1

⫺2.8

⫹125

7.5

150

0.36

0.9

2.4

⫺0.36

⫺1.15

⫺0.9

⫺2.4

Min.

–

0.51

1.3

3.4

⫺0.51

⫺1.6

⫺1.3

⫺3.4

–

4.95

9.95

14.95

–

3.5

–

Typ.

0.01

0.02

2.6

6.8

⫺1

⫺3.2

⫺2.6

⫺6.8

–

± 10

⫺5

Max.

0.25

0.5

–

0.05

–

1.5

–

± 0.1

LIMITS AT INDICATED TEMPERATURES (°C)

+ 25

±0.1 ±0.1

μA

±1

0.05

4.95

9.95

14.95

1.5

3.5

Figure 6.29 Open-collector output with pull-up resistor.

TTL IC

output

transistor

open

collector

pull-up resistor

5 V

out

…

6.11 TTL and CMOS Integrated Circuits 233

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Figure 6.30 Interfacing TTL to digital devices.

5 V

1 kΩ

TTL

5 V

many

CMOS

output input

up to

10 TTL

40 LS TTL

TTL

TTL CMOS

234 CHAPTER 6 Digital Circuits

Figure 6.30 shows how to interface TTL to different combinations of digital ICs.

The output of a TTL device sinks current when it is low and sources current when

it is high. The TTL low sink current ( I

) is the limiting factor when interfacing to

multiple TTL inputs. A TTL output can drive up to 10 standard TTL inputs or up

to 40 Low-power Schottky (LS) TTL inputs. TTL outputs are easy to interface to

CMOS due to the insulating gate input, which draws no steady state current. It is

necessary only to ensure voltages match when connecting TTL outputs to CMOS

inputs. Referring back to Figure 6.22 , a TTL low output will match a CMOS low

input just fine. However, a TTL high may be as low as 2.7 V, which is not enough to

match the 3.5 V input required by CMOS. As shown in Figure 6.30 , using a pull-up

resistor on the TTL output will raise the output voltage above the 3.5 V required by

a CMOS input. The pull-up resistor must be large enough (e.g., 1 kΩ) that the TTL

low sink current ( I

) for the device is not exceeded. If power consumption is a con-

cern, the pull-up resistor can be even larger.

Figure 6.31 shows how to interface CMOS to different combinations of digital

ICs. A CMOS device neither sources nor sinks current at its input due to the insulat-

ing gate at the input. Therefore, CMOS can interface to multiple CMOS inputs. If

CMOS is powered by a 5 V supply voltage ( V

) and is used to drive TTL devices,

a CMOS high is no problem because the CMOS device can source enough current

to drive the TTL input. However, a CMOS low can sink only enough current to drive

one LS TTL input. A CMOS 4049 buffer can be used to provide adequate fan-out for

up to two standard TTL inputs or approximately 10 LS TTL inputs.

Section 7.8 provides additional information on how to interface TTL and

CMOS inputs and outputs to various types of devices. Although the material is spe-

cific to the PIC microcontroller, it applies to any TTL and CMOS device. Included

are interfaces to sensors, switches, keyboards, Schmitt triggers, power transistors,

and relays.

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6.12 Special Purpose Digital Integrated Circuits 235

In summary, when using ICs of one logic family exclusively, you need not be

concerned with voltage levels and current drives as long as the fan-out is less than

10 for TTL (CMOS can be higher). CMOS is better for general use because it draws

no current unless switching, and the output swings nearly from ground to the posi-

tive supply value. However, at high frequency, CMOS can dissipate nearly the power

required by an equivalent TTL circuit.

6.12 SPECIAL PURPOSE DIGITAL

INTEGRATED CIRCUITS

This section presents some important special purpose ICs useful for digital design.

They include the decade counter, the Schmitt trigger, and the 555 timer ICs.

6.12.1 Decade Counter

Section 6.10.3 presented a flip-flop circuit that can be used to perform binary count-

ing. Another common counter, called a decade counter, can be constructed using a

7490 IC ( Question 6.49 ). It is a negative edge-triggered counter, and the output is in

binary coded decimal (BCD) consisting of 4 bits, making it useful for decimal count-

ing applications. Table 6.10 shows the output sequence for the 4 bits as the counter

increments from 0 to 9. The timing diagram for the input and four outputs of the

decade counter are shown in Figure 6.32 . Note that the counter output cycles back

to 0000 (0

) after 1001 (9

As illustrated in Figure 6.33 , BCD counters can be cascaded in order to count

in powers of 10. Output D can be used as the clock input for a second 7490, thus

cascading the two together to raise the range for counting from 0 to 99. Further cas-

cading allows counting of higher powers of 10. The 7490 is a versatile IC and can

Figure 6.31 Interfacing CMOS to digital devices.

CMOS

LS TTL

output input

many

CMOS

4049B buffer

up to

2 TTL

10 LS TTL

CMOS

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Figure 6.32 Decade counter timing.

clock

01 4 6 8

0246

2 3

Table 6.10 7490 decade counter BCD coding

Decimal

Count

BCD Output

DCBA

00000

10001

20010

30011

40100

50101

60110

70111

81000

91001

00000

Figure 6.33

Cascaded decade counters.

thousands digit hundreds digit tens digit ones digit

7490

Decade

7490

Decade

7490

Decade

7490

Decade

clock

pulses

7-seg.

LED

display

DBAC

7-seg.

LED

display

DBAC

7-seg.

LED

display

DBAC

7-seg.

LED

display

DBAC

236 CHAPTER 6 Digital Circuits

be wired in a variety of useful ways. Examples include binary counters, divide-by-2

counters, and divide-by-4 counters. Internet Link 6.6 points to the entire data sheet

for the 7490. The data sheet provides instructions for wiring the IC for the various

configurations it supports.

Internet Lin

6.67490 decade

counter data sheet

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Figure 6.34 Seven-segment LED display.

Figure 6.35 Two-digit LED display and a 7447 display decoder.

2-digit

LED

display

7447

display

decoder

Table 6.11 7447 BCD to seven-segment decoder

Decimal

digit

Input Output

D CBA abcdefg

0 0 0 0 0 0000001

1 0 0 0 1 1001111

2 0 0 1 0 0010010

3 0 0 1 1 0000110

4 0 1 0 0 1001100

5 0 1 0 1 0100100

6 0 1 1 0 1100000

7 0 1 1 1 0001111

8 1 0 0 0 0000000

9 1 0 0 1 0000100

6.12 Special Purpose Digital Integrated Circuits 237

A convenient device for viewing a BCD output is a seven-segment LED

display (see Figure 6.34 ) driven by a 7447 BCD-to-seven-segment decoder.

Figure 6.35 shows a two-segment LED display that can display numbers ranging

from 0 to 99. Also shown in the photograph is the 7447 display decoder IC. The

7447 converts the 4 BCD bits at its inputs into a 7-bit code to drive the LED seg-

ments properly. The function table describing the input (BCD) to output (negative

logic seven-segment LED code) relationship for the 7447 is shown in Table 6.11.

Verify some of the rows in this table by drawing the digits with the appropriate

segments. Figure 6.36 illustrates the internal design of the 7447, which consists

of combinational logic circuits. Internet Link 6.7 points to the full data sheet for

the 7447.

Internet Lin

6.77447 seven-

segment display

decoder data

sheet

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Figure 6.36 7447 internal design. (Courtesy of National Semiconductor, Santa Clara, CA)

238 CHAPTER 6 Digital Circuits

If the 7447 decoder driver is properly connected to a seven-segment LED dis-

play, the output from a counter can be displayed in numerical digit form. Note that

the decoder driver does not actually drive the segment LEDs by supplying current

to them; rather, it sinks current from them as illustrated in Figure 6.37 . The outputs

of the 7447 are open-collector outputs. The resistor and LED segment complete the

circuit for each 7447 output. Therefore, the LED is ON (i.e., illuminated) when the

7447 output is low (0), allowing current to flow to ground. 330 Ω resistors are used

in series with the segments to limit the current into the decoder driver, thus prevent-

ing damage to the segments.

Lab Exercise 8 involves building a counter circuit with an LED digit display.

Video Demo 6.4 shows the final functioning circuit.

Figure 6.37 7447 output circuit.

7447

output

(ON or OFF)

LED

segment

330

+5 V

Video Demo

6.4Decade

counter and

display circuit

driven by a 555

timer

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6.12 Special Purpose Digital Integrated Circuits 239

6.12.2 Schmitt Trigger

In some applications, digital pulses may not exhibit sharp edges; instead, the signal

may ramp from 0 to 5 V over a finite time period, and it may do so in a “noisy”

(jumpy) fashion as illustrated in Figure 6.38 . The Schmitt trigger is a device that can

convert such a signal into a sharp pulse using the threshold hysteresis effect illus-

trated in the figure. The output goes high when the input exceeds the high thresh-

old and remains high until the input falls below the low threshold. The hysteresis

between the low and high thresholds results in the distinct edges in the output. Six

Schmitt triggers are usually packaged on a single IC (e.g., the 7414 Hex Schmitt

Trigger Inverter).

Section 6.10.1 presented a circuit that can be used to debounce an SPDT

switch, which has three leads. That circuit cannot be used to debounce signals

from an SPST switch, which only has two leads. Common pushbutton switches

are normally of this variety (see Section 9.2.1 for more information). Figure 6.39

shows a Schmitt trigger RC circuit that can be used to debounce an SPST switch.

As the inversion circle on the output of the 7414 indicates, the 7414 is a Schmitt

trigger inverter, meaning the output will be the inverse of the input. With the

switch open, as shown, the capacitor is fully charged to 5 V, and the output of the

7414 is low. When the switch is closed, the capacitor is shorted to ground, and the

7414’s output goes high. Depending on the capacitor value, the capacitor voltage

might discharge below the low threshold of the 7414 on first contact. If not, the

capacitor will eventually discharge as any bouncing occurs and continual contact

■ CLASS DISCUSSION ITEM 6.13

Up-Down Counters

Using a TTL logic handbook or an online search, look up the digital IC known as

an up-down counter. Note that the device can be used as a binary, hexadecimal,

or decimal counter. Discuss the purpose of counting both up and down and give

examples of devices that might use the different configurations.

Figure 6.38 Input and output of a Schmitt trigger.

input

output

high threshold

low threshold

input output

schematic

symbol

5 V

0 V

Lab Exercise

Lab 8Digital

circuits—counter

and LED display

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Figure 6.40 Block diagram of the 555 IC.

control

flip-flop

outpu

discharge

reset

threshold

comparator

trigger

comparator

threshold

trigger

–

control

Figure 6.39 Schmitt trigger SPST debounce circuit.

5 V

SPST

switch

7414

debounced

output

240 CHAPTER 6 Digital Circuits

is established. When the switch is opened, the capacitor again begins to charge.

Any switch bounce occurring when the switch is opened just momentarily inter-

rupts the charging. When the charge on the capacitor exceeds the high threshold

of the 7414, the output again goes low. The result is a clean, bounce-free, output

pulse.

6.12.3 555 Timer

The 555 integrated circuit is known as the “time machine” because it performs a

wide variety of timing tasks. It is a combination of digital and analog circuits. The

block diagram for the 555, including pin terminology and numbering, is shown

in Figure 6.40 . Two packages and pin configurations for the 555 are shown in

Figure 6.41 . Manufacturers usually list 555 ICs (e.g., TI’s NE555) in the special

function section of their Linear data books. Internet Link 6.8 points to the complete

data sheet for the 555 IC. Applications for the 555 include bounce-free switches,

cascaded timers, frequency dividers, voltage-controlled oscillators, pulse genera-

tors, LED flashers, and many other useful circuits.

A circuit easily built with a 555 IC is the monostable multivibrator shown in

Figure 6.42 . It is constructed by adding an external capacitor and resistor to a 555.

Internet Lin

6.8NE555 timer

data sheet

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