18-8 Industrial Communication Systems
18.10 architecture, Protocol, and algorithms
e.idea.behind.the.NTP.is.to.distribute.a.common.notion.of.time.among.all.nodes.of.a.network.in.
terms.of.a.reference.clock..is.goal.can.be.achieved.in.quite.dierent.strategies:
•
. Minimization.of.clock oset,.which.tries.to.minimize.the.sampled.dierence.between.the.local.
and.the.reference.time.
•
. Alignment.of.the.frequency..is.is.equal.to.the.rst.strategy,.with.the.exception.that.the.absolute.o-
set
.of.periodically.generated.clock.signals.is.not.considered,.but.the.stability.of.the.oset.optimized.
•
. e.alignment.of.the.absolute.clock.value.in.terms.of.minimizing.clock.oset.and.optimizing.the.
dierence.between.all.nodes..is.criterion.is.equal.to.internal.clock.synchronization.(alignment.
of.all.nodes.of.a.network.with.no.respect.to.the.absolute.time.scale),.with.the.exception.that.NTP.
inherently.assumes.an.alignment.to.an.absolute.correct.time.source.of.the.overall.master.
18.11 NtP Clock Synchronization Hardware requirements
Like.any.other.clock.synchronization.system,.NTP.has.to.make.certain.assumptions.regarding.the.clocks..
As.NTP.aims.to.synchronize.hosts.within.the.Internet,.one.assumption.is.that.the.architecture.of.every.
node.is.similar.to.a.clock.in.a.PC..One.further.assumption.of.NTP.is.that.a.network.node.does.not.neces-
sarily
.need.to.be.powered.up.all.time..However,.this.requires.keeping.up.with.the.unstoppable.progress.of.
time.even.during.power.down..In.practice,.this.is.usually.done.with.a.so-called.real-time.clock.(RTC)..is.
clock.is.battery-powered.and.thus,.running.also.during.power-down.times..For.cost.and.energy.eciency.
reasons,.these.clocks.are.usually.equipped.with.32,768.kHz.crystals..is.frequency.is.very.convenient,.
since.32,768.transitions.can.be.represented.as.2
15
,.which.means.that.a.15.bit.counter.can.be.used.without.
further.fractional.parts.to.represent.1.s..In.common.PC.architectures,.the.content.of.this.clock.is.loaded.
during.boot-up.into.a.tick.register..Usual.clock.registers.for.NTP.are.48.bit.wide,.and.updated.by.adding.
the.32.bit.wide.clock-adjust.register,.with.an.interrupt.typically.scheduled.every.1–20.ms..e.content.is.
also.called.processor.cycle.counter.(PCC)..As.these.registers.are.updated.by.means.of.soware.routines.
and.without.the.possibility.to.schedule.future.updates.(such.as.provided.in.high.precision.clocks.like.in.
SynUTC),.writing.to.these.registers.has.to.be.done.with.high.priority.[Mills1998a]..Additionally,.the.16.bit.
wide.dri-compensation.register.is.used.to.compensate.the.frequency.oset.of.the.processor.clock.
18.12 Synchronization algorithms of NtP
Figure.18.6.shows.the.ve.components.of.the.NTP:
•
. e.data lter.is.instantiated.on.the.client.side.for.every.server..e.main.task.of.this.unit.is.to.
calculate.the.delay.through.round-trip.measurements.and.adjust.the.contents.of.each.message.
accordingly.
Network
Data filter
Peer selection
Clock combining Loop filter
Adjustable
clock
Data filter
Data filter
FIGURE 18.6 System.concept.of.a.typical.NTP.node.(NTPSystemConcept.pdf).
© 2011 by Taylor and Francis Group, LLC