Bryan L. Programmable controllers. Theory and implementation
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will also have greater memory requirements. Depending on the PLC’s
manufacturer, the application memory may also include the data table and I/O
table (discussed in the next section). If this is the case, then the amount of
“real” user application memory available will be less than that specified.
Exact memory usage can be determined by consulting the manufacturer’s
memory utilization specifications.
Executive
Data Table
Scratch Pad
User Program
System
Memory
Application
Memory
Figure 5-6. A simplified memory map.
Although two different programmable controllers rarely have identical
memory maps, a generalized discussion of memory organization is still valid
because all programmable controllers have similar storage requirements. In
general, all PLCs must have memory allocated for four basic memory areas,
which are as follows:
• Executive Area. The executive is a permanently stored collection of
programs that are considered part of the system itself. These supervi-
sory programs direct system activities, such as execution of the
control program, communication with peripheral devices, and other
system housekeeping activities.
5-4 MEMORY ORGANIZATION AND I/O INTERACTION
The memory system, as mentioned before, is composed of two major
sections—the system memory and the application memory—which in turn
are composed of other areas. Figure 5-6 illustrates this memory organiza-
tion, known as a memory map. Although the two main sections, system
memory and application memory, are shown next to each other, they are not
necessarily adjacent, either physically or by address. The memory map shows
not only what is stored in memory, but also where data is stored, according
to specific locations called memory addresses. An understanding of the
memory map is very useful when creating a PLC control program and
defining the data table.
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• Scratch Pad Area. This is a temporary storage area used by the CPU
to store a relatively small amount of data for interim calculations and
control. The CPU stores data that is needed quickly in this memory
area to avoid the longer access time involved with retrieving data from
the main memory.
• Data Table Area. This area stores all data associated with the control
program, such as timer/counter preset values and other stored con-
stants and variables used by the control program or CPU. The data
table also retains the status information of both the system inputs
(once they have been read) and the system outputs (once they have
been set by the control program).
• User Program Area. This area provides storage for programmed
instructions entered by the user. The user program area also stores the
control program.
The executive and scratch pad areas are hidden from the user and can be
considered a single area of memory that, for our purpose, is called system
memory. On the other hand, the data table and user program areas are
accessible and are required by the user for control applications. They are
called application memory.
The total memory specified for a controller may include system memory and
application memory. For example, a controller with a maximum of 64K may
have executive routines that use 32K and a system work area (scratch pad) of
1/4K. This arrangement leaves a total of 31 3/4K for application memory (data
table and user memory). Although it is not always the case, the maximum
memory specified for a given programmable controller normally includes
only the total amount of application memory available. Other controllers may
specify only the amount of user memory available for the control program,
assuming a fixed data table area defined by the manufacturer. Now, let’s take
a closer look at the application memory and explore how it interacts with the
user and the program.
APPLICATION MEMORY
The application memory stores programmed instructions and any data the
processor will use to perform its control functions. Figure 5-7 shows a
mapping of the typical elements in this area. Each programmable controller
has a maximum amount of application memory, which varies depending on
the size of the controller. The controller stores all data in the data table section
of the application memory, while it stores programmed instructions in the
user program section.
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Data Table Section. The data table section of a PLC’s application memory
is composed of several areas (see Figure 5-7). They are:
• the input table
• the output table
• the storage area
These areas contain information in binary form representing input/output
status (ON or OFF), numbers, and codes. Remember that the memory
structure contains cell areas, or bits, where this binary information is stored.
Following is an explanation of each of the three data table areas.
Input Table. The input table is an array of bits that stores the status of digital
inputs connected to the PLC’s input interface. The maximum number of input
table bits is equal to the maximum number of field inputs that can be
connected to the PLC. For example, a controller with a maximum of 64 field
inputs requires an input table of 64 bits. Thus, each connected input has an
analogous bit in the input table, corresponding to the terminal to which the
input is connected. The address of the input device is the bit and word location
of its corresponding location in the input table. For example, the limit switch
connected to the input interface in Figure 5-8 has an address of 13007
8
as its
corresponding bit in the input table. This address comes from the word
location 130
8
and the bit number 07
8
, both of which are related to the module’s
rack position and the terminal connected to the field device (see Section 6-2).
If the limit switch is OFF, the corresponding bit (13007
8
) is 0 (see Figure 5-
8a); if the limit switch is ON (see Figure 5-8b), the corresponding bit is 1.
During PLC operation, the processor will read the status of each input in the
input module and place a value (1 or 0) in the corresponding address in the
input table. The input table is constantly changing to reflect the changes of the
input module and its connected field devices. These input table changes take
place during the reading part of the I/O update.
Figure 5-7. Application memory map.
Input Table
Output Table
Register/Words
Internal Bits
Control
Program
Instructions
Data
Table
Area
User
Program
Area
Storage area
for bits and
register/words
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Output Table. The output table is an array of bits that controls the status of
digital output devices that are connected to the PLC’s output interface. The
maximum number of bits available in the output table equals the maximum
number of output field devices that can interface with the PLC. For example,
a PLC with a maximum of 128 outputs requires an output table of 128 bits.
Like the input table, each connected output has an analogous bit in the output
table corresponding to the exact terminal to which the output is connected.
The processor controls the bits in the output table as it interprets the control
program logic during the program scan, turning the output modules ON and
OFF accordingly during the output update scan. If a bit in the table is turned
ON (1), then the connected output is switched ON (see Figure 5-9a); if a bit
is cleared, or turned OFF (0), the output is switched OFF (see Figure 5-9b).
Remember that the turning ON and OFF of field devices via the output
module occurs during the update of outputs after the end of the scan.
Storage Area. The purpose of the storage area section of the data table is to
store changeable data, whether it is one bit or a word (16 bits). The storage
area consists of two parts: an internal bit storage area and a register/word
Figure 5-8. Limit switch connected to a bit in the input table.
0000000 00000000
17 16 15 14 13 12 1110 0706 05 04 03 02 01 00
(a) Limit switch is open; bit 07 is 0.
130
8
OFF
Input
Address
13007
8
L1
0
1
2
3
4
5
6
7
COM
COM
00000000 0000000
17 16 15 14 13 12 1110 0706 05 04 03 02 01 00
(b) Limit switch is closed; bit 07 is 1.
130
8
ON
Input
Address
13007
8
L1
0
1
2
3
4
5
6
7
1
0
Limit
Switch
Limit
Switch
Word
Address
Word
Address
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Figure 5-9. Field output connected to a bit in the output table.
storage area (see Figure 5-10). The internal bit storage area contains storage
bits that are referred to as either internal outputs, internal coils, internal
(control) relays, or internals. These internals provide an output, for interlock-
ing purposes, of ladder sequences in the control program. Internal outputs do
not directly control output devices because they are stored in addresses that
do not map the output table and, therefore, any output devices.
When the processor evaluates the control program and an internal bit is
energized (1), its referenced contact (the contact with this bit address) will
change state—if it is normally open, it will close; if it is normally closed, it
will open. Internal contacts are used in conjunction with either other internals
or “real” input contacts to form interlocking sequences that drive an output
device or another internal output.
The register/word storage area is used to store groups of bits (bytes and
words). This information is stored in binary format and represents quantities
or codes. If decimal quantities are stored, the binary pattern of the register
represents an equivalent decimal number (see Chapter 2). If a code is stored,
the binary pattern represents a BCD number or an ASCII code character (one
character per byte).
0000000 00 00000
17 16 15 14 1312 1110 07 06 05 04 03 02 01 00
051
8
Output
Address
05105
8
0
Output
Word Address
(b) Bit 05 is 0; output is OFF.
0000000 00 00000
17 16 15 14 1312 1110 07 06 05 04 03 02 01 00
051
8
Output
Address
05105
8
0
Output
Word Address
(a) Bit 05 is 1; output is ON.
0
1
COM
COM
L1
0
1
2
3
4
5
6
7
L1
0
1
2
3
4
5
6
7
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Figure 5-10. Storage area section of the data table.
Values placed in the register/word storage area represent input data from a
variety of devices, such as thumbwheel switches, analog inputs, and other
types of variables. In addition to input values, these registers can contain
output values that are destined to go to output interface modules connected to
field devices, such as analog meters, seven-segment LED indicators (BCD),
control valves, and drive speed controllers. Storage registers are also used to
hold fixed constants, such as preset timer/counter values, and changing
values, such as arithmetic results and accumulated timer/counter values.
Depending on their use, the registers in the register/word storage area may
also be referred to as input registers, output registers, or holding registers.
Table 5-2 shows typical constants and variables stored in these registers.
17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00
Internal 20003
Internal Bit
Storage Area
Word/Register
Storage Area
Byte
Byte
Word
Byte
Byte
Word/Register 377
(two bytes)
Storage
Area
200
277
300
301
377
Table 5-2. Constants and variables stored in register/word storage area registers.
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Figure 5-12. Closed limit switch connected to an internal output.
SOLUTION
When LS closes (see Figure 5-12), contact 10 will close, turning
internal output 2301 ON (a 1 in bit 01 of word 23). This will close contact
2301 ( ) and turn real output 20 ON, causing the light PL to turn ON
at the end of the scan.
Figure 5-11. Open limit switch connected to an internal output.
EXAMPLE 5-2
Referencing Figure 5-11, what happens to internal 2301 (word 23, bit
01) when the limit switch connected to input terminal 10 closes?
10
LS 10 2301
PL
2301 20
20
07 06 05 04 03 02 01 00
23
Word
Internal 2301
10
LS 10 2301
PL
2301 20
20
07 06 05 04 03 02 01 00
23
1
Word
Internal 2301 ON
2301
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EXAMPLE 5-3
For the memory map shown in Figure 5-13, illustrate how to represent
the following numbers in the storage area: (a) the BCD number 9876,
(b) the ASCII character
A
(octal 101) in one byte (use lower byte), and
(c) the analog value 2257 (1000 1101 0001 binary). Represent these
values starting at register 400.
S
OLUTION
Figure 5-14 shows the register data corresponding to the BCD number
9876, the ASCII character
A
, and the analog value 2257.
Figure 5-13. Memory map.
Input Table
Output Table
Storage Bit Table
Register/Word Table
000
077
100
177
200
377
400
777
Word
Input Table
Output Table
Storage Bit
Table
000
077
100
177
200
377
777
400
401
402
Word
1001 1000 0111 0110
0000 1000 1101 0001
0100 0001
BCD number
9876
ASCII character
A
(101
8
) stored in
one byte
(lower byte)
Binary equivalent of
2257 value from
an analog reading
Figure 5-14. Solution for Example 5-3.
User Program Section. The user program section of the application memory
is reserved for the storage of the control logic. All of the PLC instructions that
control the machine or process are stored in this area. The processor’s
executive software language, which represents each of the PLC instructions,
stores its instructions in the user program memory.
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When a PLC executes its program, the processor interprets the information in
the user program memory and controls the referenced bits in the data table that
correspond to real or internal I/O. The processor’s execution of the executive
program accomplishes this interpretation of the user program.
The maximum amount of user program memory available is normally a
function of the controller’s size (i.e., I/O capacity). In medium and large
controllers, the user program area is made flexible by altering the size of the
data table so that it meets the minimum data storage requirements. In small
controllers, however, the user program area is normally fixed. The amount of
user program memory required is directly proportional to the number of
instructions used in the control program. Estimation of user memory require-
ments is accomplished using the method described earlier in Section 5-3.
DATA TABLE ORGANIZATION
The data table’s organization, or configuration as it is sometimes called, is
very important. The configuration defines not only the discrete device
addresses, but also the registers that will be used for numerical and analog
control, as well as basic PLC timing and counting operations. The intention
of the following discussion of data table organization is not to go into detail
about configuration, but to review what you have learned about the memory
map, making sure that you understand how memory and I/O interact.
First, let’s consider an example of an application memory map for a PLC.
The controller has the following memory, I/O, and numbering system
specifications:
• total application memory of 4K words with 16 bits
• capability of connecting 256 I/O devices (128 inputs and 128 outputs)
• 128 available internal outputs
• capability of up to 256 storage registers, selectable in groups of 8-
word locations, with 8 being the minimum number of registers
possible (32 groups of 8 registers each)
• octal (base 8) numbering system with 2-byte (16-bit) word length
5-5 CONFIGURING THE PLC MEMORY—I/O ADDRESSING
Understanding memory organization, especially the interaction of the data
table’s I/O mapping and storage areas, helps in the comprehension of a PLC’s
functional operation. Although the memory map is often taken for granted by
PLC users, a thorough understanding of it provides a better perception of how
the control software program should be organized and developed.
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To illustrate this memory map may seem unnecessary, but at this point, we do
not know the starting address of the control program. This does not matter as
far as the program is concerned; however, it does matter when determining the
register address references to be used, since these register addresses are
referred to in the control program (i.e., timer preset and accumulated values).
With this in mind, let’s set the I/O table boundaries. Assuming the inputs are
first in the I/O mapping, the input table will start at address 0000
8
and end at
address 0007
8
(see Figure 5-15). The outputs will start at address 0010
8
and
end at address 0017
8
. Since each memory word has 16 bits, the 128 inputs
require 8 input table words, and likewise for the outputs. The starting address
for the internal output storage area is at memory location address 0020
8
and
continues through address 0027
8
(8 words of 16 bits each totaling 128 internal
output bits). Address 0030
8
indicates the beginning of the register/word
storage area. This area must have a minimum of 8 registers, with a possibility
of up to 256 registers added in 8-register increments. The first 8 required
Figure 5-15. I/O table and user memory boundaries.
171615141312111076543210
8 words
8 words
8 words
256
words
(max)
3816
words
Input Table
128 bits
Output Table
128 bits
Internals
128 bits
Registers
User Program
Memory
Word
Address
Octal
0000
8
0007
8
0010
8
0017
8
0020
8
0027
8
0030
8
0427
8
0430
8
7777
8