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AN10216-01 I

C Manual

How to Order the I2C 2002-1A Evaluation Kit

http://300pinmsa.org/document/MSA_10G_40G_TRX_

I2C_Public_Document_02_19APR02.pdf

DesignCon 2003 TecForum I

C Bus Overview

How To Obtain the New Evaluation Kit

• The I2C 2002-1A Evaluation Board Kit consists of the:

– I2C 2002-1A Evaluation Board

– I2CPort v2 Adapter Card for the PC parallel port

– 4-wire connector cable

– USB Adapter Card (no USB cable included)

–9 V power supply

– CD-ROM with operating instructions and Win-I2CNT software on

that provides easy to use PC graphical interface specific to the I

devices on the evaluation board but also with general purpose

mode for all other I

C devices.

So the idea is to look to any general systems that use

dynamic address allocation (even including ones that do

not use I

C hardware) to find the software design ideas

for building these systems.

DesignCon 2003 TecForum I

C Bus Overview

C Bus Vs SMBus - Electrical Differences

The SMBus specification can be found on SMBus web site at www.SMBus.org

Purchase the I2C 2002-1A Evaluation Board Kit

at www.demoboard.com

Slide 89

Comparison of I

C with SMBus

Low Power version of the SMBus Specification only

DesignCon 2003 TecForum I

C Bus Overview

Some words on SMBus

• Protocol derived from the I

C bus

• Original purpose: define the communication link between:

– an intelligent battery

– a charger

– a microcontroller

• Most recent specification: Version 2.0

– Include a low power version and a “normal” power version

– can be found at:

www.SMBus.org

• Some minor differences between I

C and SMBus:

– Electrical

–Timing

– Operating modes

Slide 93

SMBus is used today as a system management bus in

most PCs. Developed by Intel and others in 1995, it

modified some I

C electrical and software

characteristics for better compatibility with the quickly

decreasing power supply budget of portable equipment.

SMBus also has a "High Power" version 2.0 that

includes a "4 mA sink current" version that strictly

cannot be driven by I

C chips.

DesignCon 2003 TecForum I

C Bus Overview

C Bus Vs SMBus - Timing and operating

modes Differences

• Timing:

– Minimum clock frequency = 10 kHz

– Maximum clock frequency = 100 kHz

– Clock timeout = 35 ms

• Operating modes

– slaves must acknowledge their address all the time

(mechanism to detect a removable device’s presence)

Slide 92

The SMBus uses I

C hardware, and I

C hardware

addressing, but adds second-level software for building

special systems. In particular its specifications include

"Address Resolution Protocol" that can make dynamic

address allocations.

"Dynamic reconfiguration: The hardware and software

allow bus devices to be "hot-plugged" and used

immediately, without restarting the system. The devices

are recognized automatically and assigned unique

addresses. This advantage results in a plug-and-play

user interface." In both those protocols there is a very

useful distinction made between a System Host and all

the other devices in the system that can have the names,

and functions, of masters or slaves.

Slide 94

C/SMBus compliancy

SMBus and I

C protocols are basically the same: A

SMBus master will be able to control I

C devices and

vice-versa at the protocol level. The SMBus clock is

defined from 10 kHz to 100 kHz while I

C can be a DC

C is also used as the hardware bus with some form of

dynamic address assignment in the Optical network

module specifications you can find at this website:

AN10216-01 I

C Manual

bus (0 to 100 kHz, 0 to 400 kHz, 0 to 3.4 MHz). This

means that an I

C bus running at a frequency lower than

10 kHz will not be SMBus compliant since the

specification does not allow it.

Philips SMBus “high power” devices are also

electrically compatible with I

C specifications but

SMBus devices from others may not always be

compatible with I

C. Philips I

C devices are electrically

compatible with low power SMBus specifications but

will not normally conform to all its software features

like time-out.

Logic levels are slightly different also: TTL for SMBus:

low = 0.8V and high = 2.1V, 30%/70% V

CMOS

level for I

C. This is not a big deal if V

> 3.0 V. If the

C device is below 3.0 V then there is a problem since

the logic hi/lo levels may not be recognized.

Example for a typical I

C slave device, the PCA9552. It

will be SMBus compliant if:

- 10 kHz < Fclock < 100 kHz Timeout feature: SMBus has a timeout feature, resetting

the devices if a communication takes too long (thus

explaining the min clock frequency at 10 kHz). I

C can

be a "DC" bus meaning that a slave device stretches the

master clock when performing some routine while the

master is accessing it. This will notify to the master:

"I'm busy right now but I do not want to loose the

communication with you, so hold on a little bit and I

will let you continue when I'm done" ... and a "little bit"

can be an eternity, (at least lower than 10 kHz).

- It the device works in a 3.3V or higher

environment

Note: the PCA9552 will not be able to reset itself if the

bus communication time is higher than the timeout

value. That is pretty much the case for all Philips

devices. Often the time-out feature can be added for a

few cents in discrete hardware. See Slide 57.

SMBus protocol just assumes that if something takes

too long, then it means that there is a problem in the bus

and that everybody must reset in order to clear this

mode. Slave devices are not then allowed to hold the

clock low too long.

Intelligent Platform Management Interface

(IPMI)

Intel initiative in conjunction with hp, NEC and Dell

and consists of three specifications:

• IPMI for software extensions

Differences SMBus 1.0 and SMBus 2.0

• Intelligent Platform Management Bus (IPMB) for

intra-chassis (in side the box) extensions

Here is the statement from the SMBus 2.0 document:

This specification defines two classes of electrical

characteristics, low power and high power. The first

class, originally defined in the SMBus 1.0 and 1.1

specifications, was designed primarily with Smart

Batteries in mind, but could be used with other low-

power devices.

• Inter Chassis Management Bus (ICMB) for inter-

chassis (outside of the box) extensions

Needed since as the complexity of systems increase,

MTBF decreases. IPMI defines a standardized,

abstracted, message-based interface to intelligent

platform management hardware are defines

standardized records for describing platform

management devices and their characteristics. IPMI

provides a self monitoring capability increasing

reliability of the systems

This 2.0 version of the specification introduces an

alternative higher power set of electrical characteristics.

This class is appropriate for use when higher drive

capability is required, for example with SMBus devices

on PCI add-in cards and for connecting such cards

across the PCI connector between each other and to

SMBus devices on the system board.

IPMI

Provides a self monitoring capability increasing

reliability of the systems

Devices may be powered by the bus V

or by another

power source, VBus, (as with, for example, Smart

Batteries) and will inter-operate as long as they adhere

to the SMBus electrical specifications for their class.

Monitor server physical health characteristics:

• Temperatures

• Voltages

• Fans

• Chassis intrusion

Philips devices have a higher power set of electrical

characteristics than SMBus1.0.

General system management:

• Automatic alerting

Main parameter is the current sink capability with Vol

= 0.4V.

• Automatic system shutdown and re-start

• Remote re-start

- SMBus low power = 350 uA

• Power control

- SMBus high power = 4 mA

- I

C = 3 mA

AN10216-01 I

C Manual

More information:

DesignCon 2003 TecForum I

C Bus Overview

100

BMC

Overall IPMI Architecture

ICMB

www.intel.com/design/servers/ipmi/ipmi.htm

Standardized bus and protocol for extending

management control, monitoring, and event delivery

within the chassis:

IPMB

• I

C based

• Multi-master

• Simple Request/Response Protocol

• Uses IPMI Command sets

• Supports non-IPMI devices

• Physically I

C but write only (master capable

devices), hot swap not required.

• Enables the Baseboard Management Controller

(BMC) to accept IPMI request messages from

other management controllers in the system.

Slide 100

• Allows non-intelligent devices as well as

management controllers on the bus.

Where IPMI is being used

• BMC serves as a controller to give system software

access to IPMB

Intel Server Management

Servers today run mission-critical applications. There is

literally no time for downtime. That is why Intel created

Intel® Server Management – a set of hardware and

software technologies built right into most Intel® sever

boards that monitors and diagnoses server health. Intel

Server Management helps give you and your customers

more server uptime, increased peace of mind, lower

support costs, and new revenue opportunities.

Defines a standardized interface to intelligent platform

management

Hardware

• Prediction and early monitoring of hardware

failures

• Diagnosis of hardware problems

• Automatic recovery and restoration measures after

failure

More information:

http://program.intel.com/shared/products/servers/boards

/server_management

• Permanent availability management

• Facilitate management and recovery

• Autonomous Management Functions: Monitoring,

Event Logging, Platform Inventory, Remote

Recovery

PICMG

PICMG (PCI Industrial Computer Manufacturers

Group) is a consortium of over 600 companies who

collaboratively develop open specifications for high

performance telecommunications and industrial

computing applications. PICMG specifications include

CompactPCI® for Eurocard, rack mount applications

and PCI/ISA for passive backplane, standard format

cards. Recently, PICMG announced it was beginning

development of a new series of specifications, called

AdvancedTCA™, for next-generation

telecommunications equipment, with a new form factor

and based on switched fabric architectures.

Implemented using Autonomous Management

Hardware:

Designed for Microcontrollers based implementations

Hardware implementation is isolated from software

implementation

New sensors and events can then be added without any

software changes

More information can be found at:

http://www.picmg.org

AN10216-01 I

C Manual

DesignCon 2003 TecForum I

C Bus Overview

104

Use of IPMI within PICMG

Known as Specification Based on Comments

cPCI PICMG 2.0 NA No IPMB

cPCI PICMG 2.9 IPMI 1.0 Single hot swap IPMB optional

AdvancedTCA

PICMG 3.x IPMI 1.5 Dual redundant hot swap IPMB mandatory

• PICMG 2.0: CompactPCI Core

• PICMG 2.9: System Management

• PICMG 3.0: AdvancedTCA Core

• 3.1 Ethernet Star (1000BX and XAUI) –

FC-PH links mixed with 1000BX

• 3.2 InfiniBand® Star & Mesh

•3.3 StarFabric

• 3.4 PCI Express

Slide 106 shows one of the two redundant buses that

would interface through the PCA9511 or

PCA9512/13/14.

DesignCon 2003 TecForum I

C Bus Overview

107

VME

• Motorola, Mostek and Signetics

cooperated to define the standard

• Mechanical standard based on the

Eurocard format.

• Large body of mechanical

hardware readily available

• Pin and socket connector scheme

is more resilient to mechanical wear

than older printed circuit board

edge connectors.

• Hundreds of component

manufacturers support applications

such as industrial controls, military,

telecommunications, office automation

and instrumentation systems.

Slide 104

IPMI with additional extension is used as the basis for

PICMG 2.9 and PICMG 3.x.

www.vita.com

Slide 107

DesignCon 2003 TecForum I

C Bus Overview

105

Managed ATCA Board Example

PCA9511 PCA951 1

• Dual, redundant -48VDC power distribution to each

card w. high current, bladed power connector

• High frequency differential data connectors

• Robust keying block

• Two alignment pins

• Robust, redundant system management

• 8U x 280mm card size

• 1.2” (6HP) pitch

• Flexible rear I/O connector area

VMEbus

VMEbus is a computer architecture. The term 'VME'

stands for VERSAmodule Eurocard and was first

coined in 1980 by the group of manufacturers who

defined it. This group was composed of people from

Motorola, Mostek and Signetics corporations who were

cooperating to define the standard. The term 'bus' is a

generic term describing a computer data path, hence the

name VMEbus. Actually, the origin of the term 'VME'

has never been formally defined. Other widely used

definitions are VERSAbus-E, VERSAmodule Europe

and VERSAmodule European. However, the term

'Eurocard' tends to fit better, as VMEbus was originally

a combination of the VERSAbus electrical standard,

and the Eurocard mechanical form factor.

Slide 105

Slide 105 shows how IPMI is used within an

AdvancedTCA card.

VERSAbus was first defined by Motorola Corporation

in 1979 for its 68000 microprocessor. Initially, it

competed with other buses such as Multibus™, STD

Bus, S-100 and Q-bus. However, it is rarely used

anymore. The microcomputer bus industry began with

the advent of the microprocessor, and in 1980 many

buses were showing their age. Most worked well with

only one or two types of microprocessors, had a small

addressing range and were rather slow. The VMEbus

architects were charged with defining a new bus that

would be microprocessor independent, easily upgraded

from 16 to 32-bit data paths, implement a reliable

mechanical standard and allow independent vendors to

build compatible products. No proprietary rights were

assigned to the new bus, which helped stimulate third

party product development. Anyone can make VMEbus

products without any royalty fees or licenses. Since

much work was already done on VERSAbus it was

used as a framework for the new standard.

DesignCon 2003 TecForum I

C Bus Overview

106

Managed ATCA Shelf: Example 1

PCA9511 PCA9511

PCA9511 PCA9511 PCA9511 PCA9511 PCA9511 PCA9511 PCA9511 PCA9511 PCA9 511 PCA9511 PCA9511 PCA9511 PCA9511 PCA95 11

PCA9511 PCA9511

Slide 106

AN10216-01 I

C Manual

C Device Overview

In addition, a mechanical standard based on the

Eurocard format was chosen. Eurocard is a term that

loosely describes a family of products based around the

DIN 41612 and IEC 603-2 connector standards, the

IEEE 1101 PC board standards and the DIN 41494 and

IEC 297-3 rack standards. When VMEbus was first

developed, the Eurocard format had been well

established in Europe for several years. A large body of

mechanical hardware such as card cages, connectors

and sub-racks were readily available. The pin and

socket connector scheme is more resilient to

mechanical wear than older printed circuit board edge

connectors.

DesignCon 2003 TecForum I

C Bus Overview

110

C Device Categories

• TV Reception

• Radio Reception

• Audio Processing

• Infrared Control

• DTMF

• LCD display control

• Clocks/timers

• General Purpose I/O

• LED display control

• Bus Extension/Control

• A/D and D/A Converters

• EEPROM/RAM

• Hardware Monitors

• Microcontroller

The marriage of the VERSAbus electrical specification

and the Eurocard format resulted in VMEbus Revision

A. It was released in 1981. The VMEbus specification

has since been refined through revisions B, C, C.1, IEC

821, IEEE 1014-1987 and ANSI/VITA 1-1994. The

ANSI, VITA, IEC and IEEE standards are important

because they make VMEbus a publicly defined

specification. Since no proprietary rights are assigned to

it, vendors and users need not worry that their products

will become obsolete at the whim of any single

manufacturer. Since its introduction, VMEbus has

generated thousands of products and attracted hundreds

of manufacturers of boards, mechanical hardware,

software and bus interface chips. It continues to grow

and support diverse applications such as industrial

controls, military, telecommunications, office

automation and instrumentation systems.

Slide 110

C devices can be broken down into different

categories.

• TV reception: Provides TV tuning and reception

• Radio reception: Provides radio tuning and

reception

• Audio Processing

• Infra-Red control

• DTMF: Dual Tone Multiple Frequency

• LCD display control: Provides power to segments

of an LCD that are controlled via I

C bus

• LED display control: Provides power to segments

of an LED that are controlled via I

C bus

• Real time clocks and event counters: counting the

passage of time, chronometer, periodic alarms for

safety applications, system energy conservation,

time and date stamp for point of sales terminals or

bank machines.

Use of IPMI in VME Architecture

New VME draft standard indirectly calls for IPMI over

C for the system management protocol since there

was nothing to be gained by reinventing a different

form of system management for VME. The only change

from the PICMG 2.9 system management specification

is to redefine the backplane pins used for the I

C bus

and to redefine the capacitance that a VME board can

present on the I

C bus. The pin change was required

because the VME backplane connectors are different

from cPCI. The capacitance change was required

because cPCI can have a maximum of 8 slots and VME

can have a maximum of 21 slots. System Management

for VME Draft Standard VITA 38 – 200x Draft 0.5 9

May 02 draft at:

• General Purpose Digital Input/Output (I/O):

monitoring of ‘YES’ or ‘NO’ information, such as

whether or not a switch is closed or a tank

overflows; or controlling a contact, turning on an

LED, turning off a relay, starting or stopping a

motor, or reading a digital number presented at the

port (via a DIP switch, for example).

• Bus Extension/Control: expends the I

C bus

beyond the 400 pF limit, allows different voltage

devices on the same I

C bus or allows devices with

the same I

C address to be selectively addressed on

the I

C bus.

http://www.vita.com/vso/draftstd/vita38.d0.5.pdf

provides more information.

• Analog/digital conversion: measurement of the size

of a physical quantity (temperature, pressure…),

proportional control; transformation of physical

analog values into numerical values for calculation.

• Digital/analog conversion: creation of particular

control voltages to control DC motors or LCD

contrast.

• RAM: Random Access Memory

AN10216-01 I

C Manual

C devices are designed in the process that allows best

electrical and ESD performance and are manufactured

in Philips or third party fabs through out the world.

Philips has taken the initiative to offer the same process

in multiple internal fabs to provide redundancy and

continuation of supply in any market condition.

• EEPROM: Electrically Erasable Programmable

Read Only Memory, retains digital information

even when powered down

• Hardware Monitors: monitoring of the temperature

and voltage of systems

• Microprocessors: Provides the brains behind the

C bus operation.

TV Reception

DesignCon 2003 TecForum I

C Bus Overview

111

C Product Characteristics

• Package Offerings

Typically DIP, SO, SSOP, QSOP,

TSSOP or HVQFN packages

• Frequency Range

Typically 100 kHz operation

Newer devices operating up to 400 kHz

Graphic devices up to 3.4 MHz

• Operating Supply Voltage Range

2.5 to 5.5 V or 2.8 to 5.5 V

Newer devices at 2.3 to 5.5 V or 3.0 to 3.6 V with 5 V tolerance

• Operating temperature range

Typically -40 to +85 ºC

Some 0 to +70 ºC

• Hardware address pins

Typically three (A

, A

) are provided to allow up to eight of the

identical device on the same I

C bus but sometimes due to pin

limitations there are fewer address pins

DesignCon 2003 TecForum I

C Bus Overview

112

TV Reception

The SAA56xx family of microcontrollers are

a derivative of the Philips industry-standard

80C51 microcontroller and are intended for

use as the central control mechanism in a

television receiver. They provide control

functions for the television system, OSD and

incorporate an integrated Data Capture and

display function for either Teletext or Closed

Caption.

Additional features over the SAA55xx family have been included, e.g. 100/120

Hz (2H/2V only) display timing modes, two page operation (50/60 Hz mode for

16:9, 4:3), higher frequency microcontroller, increased character storage, more

80C51 peripherals and a larger Display memory. For CC operation, only a

50/60 Hz display option is available.

Byte level I²C-bus up to 400 kHz dual port I/O

Slide 111

Slide 112

The frequency range of most of the newer I

C devices

is up to 400 kHz and we are moving to 3.4 MHz for

future devices where typical uses would be in consumer

electronics where a DSP is the master and the designer

wants to rapidly send out the I

C information and then

move on to other processing needs.

The I

C bus is used as a means to easily move control

or status information on and off the devices. The

SA56xx is given as an example of this type of device.

Radio Reception

DesignCon 2003 TecForum I

C Bus Overview

113

Radio Reception

The TEA6845H is a

single IC with car

radio tuner for AM

and FM intended

for microcontroller

tuning with the I²C-

bus. It provides the

following functions:

• AM double conversion receiver for LW, MW and SW (31 m, 41 m and 49 m

bands) with IF1 = 10.7 MHz and IF2 = 450 kHz

• FM single conversion receiver with integrated image rejection for IF = 10.7 MHz

capable of selecting US FM, US weather, Europe FM, East Europe FM and Japan

FM bands.

The operating range of most of the newer CMOS

devices is 2.3 to 5 V to allow operation at the 2.5, 3.3

and 5V nodes. Some processes restrict the voltage

range to the 3.3 V node. Most customers have moved

from 5 V and are now at 3.3 V but several are moving

rapidly to 2.5 V and even 1.8 V in the near future. We

are working on next generation general purpose devices

to support 1.8 V operation and currently have some

LCD display drivers that operate down to 1 V.

The operating temperature range is typically specified

at the industrial temperature range but again depending

on process or application, the range may be specified

higher or lower. The automotive, military and aviation

industries have expressed more interest in I

C devices

due to the low cost and simplicity of operation so future

devices temperature ranges may be expanded to meet

their needs.

Slide 113

Again, the I

C bus is used to control frequency

selection or control the audio sound control and

interface with the microcontroller. Special software

programs, applied by connecting to the I

C bus during

factory testing, automatically perform the alignment of

the RF sections of the receiver, eliminating the need for

manual or mechanical adjustments. The alignment

information will be stored in some non-volatile memory

C devices were typically offered in either DIP or SO

and limited their use in equipment where space is at a

premium. Newer I

C devices are typically offered in

SO, TSSOP or near chip scale HVQFN packages.

AN10216-01 I

C Manual

chip and re-sent to the receiver chip, where it is stored

in R.A.M., each time power is applied to the receiver.

Audio Processing

DesignCon 2003 TecForum I

C Bus Overview

114

Audio Processing

The SAA7740H is a function-

specific digital signal processor.

The device is capable of

performing processing for

listening-environments such as

equalization, hall-effects,

reverberation, surround-sound

and digital volume/balance

control. The SAA7740H can

also be reconfigured (in a dual

and quad filter mode) so that it

can be used as a digital filter

with programmable

characteristics.

The SAA7740H realizes most functions directly in hardware. The flexibility exists in

the possibility to download function parameters, correction coefficients and various

configurations from a host microcontroller. The parameters can be passed in real

time and all functions can be switched on simultaneously. The SAA7740H accepts

2 digital stereo signals in the I2S-bus format at audio sampling frequency (fast )

and provides 2 digital stereo outputs.

Slide 114

The I

C bus is used to control the audio and sound

balance.

Dual Tone Multi-Frequency (DTMF)

DesignCon 2003 TecForum I

C Bus Overview

115

DTMF/Modem/Musical Tone Generators

• Modem and musical tone generation

• Telephone tone dialing

•DTMF

> Dual Tone Multiple Frequency

• Low baud rate modem

Slide 115

The PCD3311C and PCD3312C are single-chip silicon

gate CMOS integrated circuits. They are intended

principally for use in telephone sets to provide the dual-

tone multi-frequency (DTMF) combinations required

for tone dialing systems. The various audio output

frequencies are generated from an on-chip 3.58 MHz

quartz crystal-controlled oscillator. A separate crystal is

used, and a separate microcontroller is required to

control the devices.

Both the devices can interface to I

C bus compatible

microcontrollers for serial input. The PCD3311C can

also interface directly to all standard microcontrollers,

accepting a binary coded parallel input. With their on-

chip voltage reference the PCD3311C and PCD3312C

provide constant output amplitudes that are independent

of the operating supply voltage and ambient

temperature. An on-chip filtering system assures a very

low total harmonic distortion in accordance with CEPT

recommendations. In addition to the standard DTMF

frequencies the devices can also provide:

• Twelve standard frequencies used in simplex

modem applications for data rates from 300 to

1200 bits per second

• Two octaves of musical scales in steps of

semitones.

LCD Display Driver

DesignCon 2003 TecForum I

C Bus Overview

116

DDRAM

Bias voltage

generator

Voltage

multi-

plier

Column driver

Sequencer

Row driver

Control

logic

CGRAM

CGROM

Supply

SDA

SCL

Display size:

2 line by 12 characters +

120 icons

LCD Display Control

C LCD Display Driver

The LCD Display driver is a complex device and is an

example of how "complete" a system an I

C chip can be –

it generates the LCD voltages, adjusts the contrast,

temperature compensates, stores the messages, has

CGROM and RAM etc etc.

Slide 116

The LCD display driver is a complex LCD driver and is

an example of how "complete" a system an I

C chip can

be - generates the LCD voltages, adjusts the contrast,

temperature compensates, stores the messages, has

CGROM and RAM etc.

DesignCon 2003 TecForum I

C Bus Overview

117

C LCD Segment Driver

The LCD Segment driver is a less complex LCD driver

(e.g., just a segment driver).

Supply

RAM

Bias voltage

generator

Segment drivers

Sequencer

Backplane drivers

Control logic

SCL

Display sizes

1 x 24 … 2 x 40…

single chip: 4 x 40 ... 16 x 24

SDA

LCD Segment Control

Slide 117

The LCD segment driver is a less complex LCD driver

(e.g., just a segment driver). Philips focus is for large

AN10216-01 I

C Manual

volume consumer display apps, which is right now

B&W and color STN LCD displays and in near future it

will be TFT and OLED (organic LED displays). The

OLED drivers will most probably not be useable with

conventional LEDs.

VGA is beyond our current roadmap that stretches only

up to about 1/4 VGA. This is simply because of the

requirements that we see in the mobile telecomm

market, our main focus. We find already that I

C does

not give us enough transmission rate for display data so

serial bus is mainly intended for control and text

overlay signals in such displays.

Light Sensor

DesignCon 2003 TecForum I

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118

C Light Sensor

The TSL2550 sensor converts the intensity of ambient light into digital signals

that, in turn, can be used to control the backlighting of display screens found in

portable equipment, such as laptops, cell phones, PDAs, camcorders, and GPS

systems. The device can also be used to monitor and control commercial and

residential lighting conditions.

By allowing display brightness to be adjusted to ambient conditions, the sensor

is expected to bring about a significant reduction in the power dissipation of

portables.

The TSL2550 all-silicon sensor combines two photodetectors, with one of the

detectors sensitive to both visible and infrared light and the other sensitive only

to IR light. The photodetectors’s output is converted to a digital format, in which

form the information can be used to approximate the response of the human

eye to ambient light conditions sans the IR element, which the eye cannot

perceive.

Slide 118

Slide 118 shows a new innovation in light detectors that

uses the I

C bus to transfer information to and from the

sensor.

Real Time Clock/Calendar

DesignCon 2003 TecForum I

C Bus Overview

119

32kHz

SDA

SCL

Alarm-, Timer-

Registers

Sub

address

decoder

Oscillator /

prescaler

Real-Time Clock / Calendar

C-bus

interface

Counters:

s, min, h, day,

month, year

(240 Byte RAM 8583)

Interrupt

POR

C Real Time Clock/Calendar

Real time clocks and

event counters count

the passage of time and

act as a chronometer

They are used in

applications such as:

• periodic alarms for

safety applications

• system energy

conservation

• time and date stamp

for point of sales

terminals or bank

machines

Slide 119

Philips offers four RTCs, these are PCF8593, PCF8583,

PCF8573 and PCF8563. The PCF8563 is the most

recently developed and is technically the most

advanced. The RTCs have one interrupt output and do

not track the exact year. This must be done in software

by the customer. They do use a 4-year calendar base

and can count 255 years. PCF8583 has the added

advantage of 240 bytes of RAM integrated with the

RTC. This could be important if such small RAM is

required then we replace two chips with one.

General Purpose I/O Expanders

DesignCon 2003 TecForum I

C Bus Overview

120

C General Purpose I/O Expanders

• Transfers keyboard, ACPI Power switch, keypad, switch or other inputs

to microcontroller via I

C bus

• Expand microcontroller via I

C bus where I/O can be located near the

source or on various cards

• Use outputs to drive LEDs, sensors, fans, enable and other input pins,

relays and timers

• Quasi outputs can be used as Input or Output without the use of a

configuration register.

Supply

SDA

SCL

Latches

Sub

address

decoder

General Purpose I/O

C-bus

interface

Interrupt

POR

≠

Input/ output stages

alternative analog

input configurations

Slide 120

Let’s talk about some of the newer devices, such as

these new general-purpose input and output (GPIO)

expansion for the I

C/SMBus.

DesignCon 2003 TecForum I

C Bus Overview

121

Quasi Output I

C I/O Expanders - Registers

• To program the outputs

Address WS

OUTPUT

DATA

• To read input values

Multiple reads are

possible during the

same communication

Address RS

INPUT

DATA

Multiple writes are

possible during the

same communication

• Important to know

–

– At power-up, all the I/O’s are HIGH; Only a current source to V

active

– An additional strong pull-up resistors allows fast rising edges

– I/O’s should be HIGH before using them as Inputs

Slide 121

The PCF8574 and PCA8575 are well known general

purpose I/O expanders. The PCA9500 is a combination

of the PCF8574 with a 2K EEPROM. The interrupt pin

is replaced by the EEPROM write protect (WP). The

EEPROM has a different fixed I

C address then the

GPIO. The PCA9501 is a combination of the PCF8574

with a 2K EEPROM. The device is offered in a 20-pin

TSSOP package and the four extra pins allow the

AN10216-01 I

C Manual

interrupt output to be included in addition to the WP.

The extra three pins are then used to offer a total of six

address pins allowing up to 64 of these devices to share

the same I

C bus. The PTN devices are design for

telecom maintenance and control applications.

DesignCon 2003 TecForum I

C Bus Overview

124

True Output I

C I/O Expanders - Example

Output

Reg#

Config

Reg#

Polarity

Reg#

Input

Reg#

I/O’s

Read/

Write

Read/

Write

Read/

Write

Read

The PCA9558 is a combination of the PCA9557 with a

2K EEPROM and 5-bit DIP Switch.

DesignCon 2003 TecForum I

C Bus Overview

123

True Output I

C I/O Expanders - Registers

• To configure the device

• To program the outputs

• To read input values

No need to access

Configuration and

Polarity registers

once programmed

Multiple reads are possible

during the same communication

Address WS

CONFIG

DATA

Address WS

POLARITY

DATA

Address WS

OUTPUT

DATA

Address WS

Address RS

INPUT

DATA

Multiple writes are

possible during the

same communication

Slide 124

Slide 124 shows an example of how the

PCA9554/54A/57 is programmable.

DesignCon 2003 TecForum I

C Bus Overview

125

Signal monitoring and/or Control

• Advantages of I

– Easy to implement (Hardware and Software)

– Extend microcontroller: I/O’s can be located near the source or on

various cards

– Save GPIO’s in the microcontroller

– Only 2 wires needed, independently of the numbers of signals

– Signal(s) can be far from the masters

– Fast enough to control keyboards

– Simplify the PCB layout

– Devices exist in the market and are massively used

Slide 123

These newer device’s true outputs provide active source

and sink current sources and does not rely upon a pull

up resistor to provide the source current. The four sets

of registers within the true outputs devices are

programmable and provide for: Configuration (Input or

Output) control, Input (value), Output (value) or

Polarity (active high or low).

The PCA9554/54A/55 devices have an interrupt output

and the 8 or 16 I/O pins can be configured for interrupt

inputs. These newly released devices have the same I

address and footprint as the PCF8574/74A/75 but

require some software modifications due to the

different I/O registers. The PCA9554 and PCA9555

have the same I

C address while the PCA9554A has a

slightly different fixed address allowing 16 devices

(eight 54A and eight 54/55 in any combination) to be

on the same I

C/SMBus. The PCA9556/57 feature a

Hardware Reset pin instead of the interrupt output that

allows the device to be reset remotely should the I

bus become hung up. The PCA9557 is an improved

version of the PCA9556 that has the electrical

characteristics of the PCA9554/54A. Information on

GPIO selection is contained within application note

AN469.

Slide 125

Signal Monitoring and/or Control first approach is to

use GPIO’s of the master(s) controlling the application.

In some applications, use of these GPIO’s is not the

best approach.

Reasons can be the following:

• Number of signals to monitor/control is too

important and requires a big amount of the

master’s GPIO’s.

• Signals can be in a remote location implying a

more complex PCB layout, with a lot of long traces

(making the design more sensitive to noise)

• Upgrade (more signals to monitor/control) requires

a total re-layout of the PCB and is limited to the

number of GPIO’s still available in the master.

AN10216-01 I

C Manual

DesignCon 2003 TecForum I

C Bus Overview

126

Signal monitoring and/or Control

• Proposed devices

# of Outputs

Interrupt and

POR

POR and 2K

EEPROM

Interrupt, POR

and 2K EEPROM

8 PCF8574/74A PCA9500/58 PCA9501

16 PCF8575/75C - -

Quasi Output (20-25 ma sink and 100 uA source )

# of Outputs Reset and POR Interrupt and POR

8 PCA9556/57 PCA9534/54/54A

16 - PCA9535/55

True Output (20-25 ma sink and 10 mA source)

• Advantages

– Number of I/O scalable

– Programmable I

C address allowing more than one device in the bus

– Interrupt output to monitor changes in the inputs

– Software controlling the device(s) easy to implement

Slide 126

The I

C GPIO device approach provides an elegant

solution with minimum hardware and software changes:

• The device(s) can be plugged to an existing I

C bus

in the application

• Minor software change is required to control the

new device(s)

• Easily upgradeable (by adding more I

C GPIO

devices)

• Remote signals can be easily controlled (requires

only a longer I

C bus trace - 2 wires only)

• Changes in the monitored input signals can be

propagated to the master through a single Interrupt

line. The master can be easily interrogate the I

GPIO to determine which input(s) generated the

Interrupt

See Application Note AN469 for more information on

GPIOs.

LED Dimmers and Blinkers

DesignCon 2003 TecForum I

C Bus Overview

127

C LED Dimmers and Blinkers

•I

C/SMBus is not tied up by sending repeated transmissions to turn LEDs

on and then off to “blink” LEDs.

• Frees up the micro’s timer

• Continues to blink LEDs even when no longer connected to bus master

• Can be used to cycle relays and timers

• Higher frequency rate allows LEDs to be dimmed by varying the duty

cycle for Red/Green/Blue color mixing applications.

Supply

SDA

SCL

Oscillator

Sub address

decoder

C-bus

interface

Reset

POR

≠

Input/ output stages

alternative analog input

configurations

Slide 127

These new devices are useful for LED driving and

blinking. The I

C/SMBus or the micro controller is not

tied up by sending repeated transmissions to blink

LEDs as is currently done when a GPIO is used. The

PCA9530/31/32/33 and the PCA9550/51/52/53 provide

the same amount of electrical sink capability as the

PCA9554/55/57 but have a built in oscillator and two

C programmable blink rates.

Two user definable blink rates and duty cycles

programmed via the I

C/SMBus. These are

programmed during the initial set up and can range

between 160 Hz and every 1.6 seconds for the LED

Dimmers and between 40 Hz and every 6.4 seconds for

the LED Blinkers. Thereafter only a single transmission

is required to turn individual LEDs: on, off or blink at

one of the two programmable blink rates. The duty

cycle can be used to ‘dim’ the LEDs using the LED

Dimmers by setting the blink rate to 160 Hz (faster than

the eye can see the blinking) and then changing the

average current through the LED by changing the duty

cycle.

The internal oscillator is regulated to +/- 10% accuracy

and no external components are required. The +/- 10%

tolerance was recommended by human factor

engineers. These devices allow you to program two

specific blink rates and then command a LED to blink

at one of these rates without sending any further I

commands. If you use normal GPIOs to blink LEDs,

you must send an ON command followed by an OFF

command followed by an ON command for the

duration of the blink. This is OK if you do not have

many LEDs to blink or much traffic on the I

C bus, or

have microcontroller overhead to burn, but if you do

this for many LEDs you will tie up the I

C bus and your

micro controller. Hence the need for dedicated LED

blinkers as a stand alone part option. Unused pins can

be used as normal GP input or output, but since they are

open-drain, a pull up resistor will be needed for logic

high outputs.

A Hardware Reset pin is included, allowing the LED

blinker to be reset independently from the rest of the

C/SMBus or higher level system. Each open drain

output can sink 25 mA of current with total package

sinking capacity limited to 100 mA for the 2, 4 and 8

bit devices and 200 mA for the 16 bit device (100 mA

for each byte). Typical LEDs take 10-25 mA of current

when in operation.