Chapter 3
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An interrupt transfer guarantees a maximum latency, or time between transac-
tion attempts. In other words, there is no guaranteed transfer rate, just the guar-
antee that the host will make bandwidth available for a transaction attempt in
each maximum latency period.
A SuperSpeed endpoint can request a burst of up to three 1024-byte packets per
bus interval for a maximum data throughput of 24.576 MB/s. A high-speed
endpoint can request up to three 1024-byte packets per microframe, which also
results in a maximum throughput of 24.576 MB/s. A high-speed endpoint that
requests more than 1024 bytes per microframe is called a high-bandwidth end-
point. For hosts that don’t support high-bandwidth interrupt endpoints, the
maximum is 8.192 MB/s. At this writing, the Windows drivers don’t support
high-speed, high-bandwidth interrupt endpoints. If the host’s driver doesn’t
support alternate interfaces, the maximum is the 64 kB/s allowed for the default
interface. A full-speed endpoint can request up to 64 bytes per frame, or 64
kB/s. A low-speed endpoint can request only up to 8 bytes every 10 ms. Devices
with endpoints that need to transfer more than 800 bytes/sec. should not be
low speed. On a USB 1.x bus, low-speed traffic uses much more bandwidth
than full-speed traffic. Limiting the bandwidth available to low-speed end-
points helps keep the bus available for other devices
The endpoint descriptor stored in the device specifies the maximum latency
period. For low-speed devices, the maximum latency can be any value from 10–
255 ms. For full speed, the range is 1–255 ms. For high speed and SuperSpeed,
the range is 125
µs to 4.096 s in increments of 125 µs. In addition, a high-speed
or SuperSpeed interrupt endpoint with a maximum latency of 125
µs can
request 1, 2, or 3 transactions per interval.
The host can begin each transaction at any time up to the specified maximum
latency since the previous transaction began. So, for example, on a full-speed
bus with a 10 ms maximum latency, five transfers could take as long as 50 ms or
as little as 5 ms. OHCI host controllers for low and full speeds schedule trans-
actions in periods of 1, 2, 4, 8, 16, or 32 ms. For a full-speed device that
requests a maximum anywhere from 8 to 15 ms, an OHCI host will begin a
transaction every 8 ms, while a maximum latency from 32 to 255 will cause a
transaction attempt every 32 ms. However, devices shouldn’t rely on behavior
that is specific to a type of host controller and should assume only that the host
complies with the specification. Chapter 8 has more about host-controller
types.